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Details, datasheet, quote on part number:XRT72L50
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| Part: | XRT72L50 |
| Category: | Communication => Network => SONET/SDH/ATM/DS3/PHYs/E3 (T3/E3) => Framers/Mappers/PHYs |
| Description: | Single-channel DS3/E3 Framer ic With HDLC Controller |
| Company: | Exar Corporation |
| Datasheet: | Download XRT72L50 datasheet File size : 215 kB |
| Request For quote: | Find where to buy XRT72L50
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Datasheet text preview:
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SEPTEMBER 2000
PRELIMINARY
XRT72L50
REV. P1.0.0
SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
GENERAL DESCRIPTION
The XRT72L50, single Channel DS3/E3 Framer IC is designed to accept "User Data" from the Terminal Equipment and insert this data into the "payload" bitfields within an "outbound" DS3/E3 Data Stream. Further, the Framer IC is also designed to receive an "inbound" DS3/E3 Data Stream (from the Remote Terminal Equipment) and extract out the "User Data". The XRT72L50 DS3/E3 Framer device is designed to support full-duplex data flow between Terminal Equipment and an LIU (Line Interface Unit) IC. The Framer Device will transmit, receive and process data in the DS3-C-bit Parity, DS3-M13, E3-ITU-T G.751 and E3ITU-T G.832 Framing Formats. The XRT72L50 DS3/E3 Framer IC consists of a Transmit section, Receiver section, Performance Monitor Section and a Microprocessor interface. The Transmit Section, includes a Transmit Payload Data Input Interface, a Transmit Overhead data Input Interface Section, a Transmit HDLC Controller, a Transmit DS3/E3 Framer block and a Transmit LIU Interface Block which permits the Terminal Equipment to transmit data to a remote terminal. The Receive Section, consists of a Receive LIU Interface, a Receive DS3/E3 Framer, a Receive HDLC Controller, a Receive Payload Data Output Interface, and a Receive Overhead Data Interface which allows
the local terminal equipment to receive data from remote terminal equipment. The Microprocessor Interface is used to configure the Framer IC in different operating modes and monitor the performance of the Framer. The Performance Monitor Sections consist of a large number of "Reset-upon-Read" and "Read-Only" registers that contain cumulative and "one-second" statistics that reflect the performance/health of the Framer IC/system. FEATURES · Transmits, Receives and Processes data in the DS3-C-bit Parity, DS3-M13, E3-ITU-T G.751 and E3-ITU-T G.832 Framing Formats. · 1 Channel HDLC Controller - Tx and Rx · Interfaces to all Popular Microprocessors · Integrated Framer Performance Monitor · Available in a 100 Pin PQFP package · 3.3V Power Supply with 5V Tolerant I/O · Operating Temperature -40°C to +85°C AP PLICATIONS · Network Interface Units · CSU/DSU Equipment. · PCM Test Equipment · Fiber Optic Terminals · DS3/E3 Frame Relay Equipment
FIGURE 1. BLOCK DIAGRAM OF THE XRT72L50
Reset TestMode NibbleLnTF TxOHInd[n:0] TxNibFrame[n:0] TxFrame[n:0] TxNibClk[n:0] TxLnClk[n:0] TxFrameRef[n:0] TxNib[3:0][n:0] TxSer[n:0]
pAddr[m:0] pData[7:0] pALE/AS pWR_L pRD_L(DS) pCS_L pDBEN_L pACK[1:0] pRdy_L/Dtack_L pReq[1:0] pType[2:0] pClk pINT_L
TxOHEnable TxOHClk TxOHFrame TxAISEn TxOH TxOHIns
T3/E3 Transmit Overhead Interface
T 3 / E 3 Transmit Framer
T3/E3 transmit Input
HDLC controller
TxLineClk[n:0] TxPOS[n:0] TxNEG[n:0] LIU Interface/ Controller T 3 FEAC & Data L i n k Controller Performance Monitor Interrupt Controller uP Interface
RxLineClk[n:0] RxPOS[n:0] RxNEG[n:0] ExtLOS
RxOHEnable[n:0] RxOHClk[n:0] RxOH[n:0] RxRed[n:0] RxOHFrame[n:0] RxOOF[n:0]
T3/E3 Receive Overhead Interface
T 3 / E 3 Receive Framer
T3/E3 Receive Output
HDLC controller
RxClk[n:0] RxOHind[n:0] RxFrame[n:0] RxNib[3:0][n:0] RxSer[n:0] RxOUTClk[n:0]
Exar Corporation 48720 Kato Road, Fremont CA, 94538 · (510) 668-7000 · FAX (510) 668-7017 · www.exar.com
XRT72L50 SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.0.0
áç
PRELIMINARY
FIGURE 2. PIN OUT OF THE XRT72L50
GND VDD DMO ExtLOS RLOL GND TxNib3/TxHDLCDat3 TxNib2/TxHDLCDat2 TxNib1/TxHDLCDat1 TxNib0/TxHDLCDat0 TxSer/SndMsg TxAISEn TxInClk GND TxFrameRef VDD D(7) D(6) D(5) D(4) D(3) D(2) D(1) D(0) GND VDD TestMode Reset MOTO GND 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
RxNib3/RxHDLCDat3 RxNib2/RxHDLCDat2 RxNib1/RxHDLCDat1 RxNib0/RxHDLCDat0 RxSer/RxIdle RxAIS RxClk GND RxFrame VDD RxOutClk/RxHDLCDat7 RxRed RxOOF RxLOS RxOHClk/RxHDLCClk RxOHInd RxOH/RxHDLCDat6 RxOHEnable/RxHDLCDat5 RxOHFrame/RxHDLCDat4 TDO
81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100
XRT72L50
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31
RxPOS RxNEG RxLineClk GND Req RLOOP LLOOP TAOS TxLev EncoDis TxPOS TxNEG TxLineClk VDD TxFrame GND TxNIBClk/SndFCS TxNibFrame/ValFCS TxOHFrame/TxHDLCClk TxOHEnable/TxHDLCDat7
ORDERING INFORMATION
PART NUMBER XRT72L50 PACKAGE TYPE 14x20mm, 100 Lead Plastic QFP OPERATING TEMPERATURE RANGE -40°C to +85°C
TDO TDI VDD TRST GND Rdy_Dtck WR_RW CS ALE_AS Rd_DS TCK TMS Int GND A(0) A(1) A(2) A(3) A(4) A(5) A(6) A(7) A(8) VDD NibbleIntf VDD TxOHClk TxOHIns/TxHDLCDat4 TxOH/TxHDLCDat5 TxOHInd/TxHDLCDat6
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
2
áç áç
PRELIMINARY
XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.0.0
TABLE OF CONTENTS
GENERAL DESCRIPTION ........ 1
FEATURES APPLICATIONS
.......... .... Figure 1. Block Diagram of the XRT72L50 .... Figure 2. Pin Out of the XRT72L50 ........
1 1 1 2
ORDERING INFORMATION ..... 2 PIN DESCRIPTIONS .. 3 ORDERING INFORMATION ............ 21
21
PACKAGE DIMENSIONS ....... 21
REVISION HISTORY .... 22
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