Details, datasheet, quote on part number: 74AC153
CategoryLogic => Multiplexers/Demultiplexers => Multiplexers->CMOS/BiCMOS->AC/ACT Family
TitleMultiplexers->CMOS/BiCMOS->AC/ACT Family
DescriptionDual 4-Input Multiplexer
CompanyFairchild Semiconductor
DatasheetDownload 74AC153 datasheet
Cross ref.Similar parts: CD54AC153F, CD54AC153F/3A, CD54AC153F3A, CD54AC153FX, CD74AC153E, CD74AC153EX, CD74AC153M, CD74AC153MX, HD74AC153FP, HD74AC153P
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Features, Applications

The is a high-speed dual 4-input multiplexer with common select inputs and individual enable inputs for each section. It can select two lines of data from four sources. The two buffered outputs present data in the true (non-inverted) form. In addition to multiplexer operation, the AC/ACT153 can act as a function generator and generate any two functions of three variables.


Order Number 74ACT153SC 74ACT153MTC Package Number M16A MTC16 Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Body 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Body 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.

Pin Names Za Zb Description Side A Data Inputs Side B Data Inputs Common Select Inputs Side A Enable Input Side B Enable Input Side A Output Side B Output

The is a dual 4-input multiplexer. It can select two bits of data from up to four sources under the control of the common Select inputs (S0, S1). The two 4-input multiplexer circuits have individual active-LOW Enables (Ea, Eb) which can be used to strobe the outputs independently. When the Enables (Ea, Eb) are HIGH, the corresponding outputs Za, Zb) are forced LOW. The AC/ACT153 is the logic implementation 2-pole, 4-position switch, where the position of the switch is determined by the logic levels supplied to the Select inputs. The logic equations for the outputs are shown below. Za = Ea Zb = Eb S1 S0)

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

Supply Voltage (VCC) DC Input Diode Current (IIK) VI = VCC 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = VCC 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current per Output Pin (ICC or IGND) Storage Temperature (TSTG) Junction Temperature (TJ) PDIP -0.5V to VCC -0.5V to VCC to +7.0V

Supply Voltage (VCC) AC ACT Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Minimum Input Edge Rate (V/t) AC Devices VIN from 70% of VCC 4.5V, 5.5V Minimum Input Edge Rate (V/t) ACT Devices VIN from to 2.0V VCC 5.5V 125 mV/ns

Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications.

Symbol VIH Parameter Minimum HIGH Level Input Voltage VIL Maximum LOW Level Input Voltage VOH Minimum HIGH Level Output Voltage VCC (V) VOL Maximum LOW Level Output Voltage IIN (Note 4) IOLD IOHD ICC (Note 4) Maximum Input Leakage Current Minimum Dynamic Output Current (Note 3) Maximum Quiescent Supply Current = +25癈 Typ to +85癈 Guaranteed Limits VIN = VIL or VIH VIN = VIL or VIH 礎 V IOL 12 mA IOL 24 mA IOL 24 mA (Note VI = VCC, GND VOLD = 1.65V Max VOHD = 3.85V Min VIN = VCC or GND V IOUT 礎 V IOH -12 mA IOH -24 mA IOH -24 mA (Note 2) V IOUT 礎 V VOUT 0.1V or VCC 0.1V V Units Conditions VOUT 0.1V or VCC - 0.1V

Note 2: All outputs loaded; thresholds on input associated with output under test. Note 3: Maximum test duration 2.0 ms, one output loaded at a time. Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.


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