|Category||Logic => Multiplexers/Demultiplexers => Multiplexers->CMOS/BiCMOS->AC/ACT Family|
|Description||Quad 2-Input Multiplexer|
|Datasheet||Download 74AC157CW datasheet|
The is a high-speed quad 2-input multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four outputs present the selected data in the true (noninverted) form. The AC/ACT157 can also be used as a function generator.Features
Order Number 74ACT157MTC 74ACT157PC Package Number MTC16 N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Body 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16 -Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Body 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16 -Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Pin Names E S ZaZd Description Source 0 Data Inputs Source 1 Data Inputs Enable Input Select Input Outputs
The is a quad 2-input multiplexer. It selects four bits of data from two sources under the control of a common Select input (S). The Enable input (E) is activeLOW. When E is HIGH, all of the outputs (Z) are forced LOW regardless of all other inputs. The AC/ACT157 is the logic implementation 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are shown below: S) A common use of the AC/ACT157 is the moving of data from two groups of registers to four common output busses. The particular register from which the data comes is determined by the state of the Select input. A less obvious use as a function generator. The AC/ACT157 can generate any four of the sixteen different functions of two variables with one variable common. This is useful for implementing gating functions.H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Supply Voltage (VCC) DC Input Diode Current (IIK) VI = VCC 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = VCC 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current per Output Pin (ICC or IGND) Storage Temperature (TSTG) Junction Temperature (TJ) PDIP -0.5V to VCC -0.5V to VCC to +7.0V
Supply Voltage (VCC) AC ACT Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Minimum Input Edge Rate (V/t) AC Devices VIN from 70% of VCC 4.5V, 5.5V Minimum Input Edge Rate (V/t) ACT Devices VIN from to 2.0V VCC 5.5V 125 mV/ns
Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications.
Symbol VIH Parameter Minimum HIGH Level Input Voltage VIL Maximum LOW Level Input Voltage VOH Minimum HIGH Level Output Voltage VCC (V) VOL Maximum LOW Level Output Voltage IIN (Note 4) IOLD IOHD ICC (Note 4) Maximum Input Leakage Current Minimum Dynamic Output Current (Note 3) Maximum Quiescent Supply Current = +25°C Typ to +85°C Guaranteed Limits VIN = VIL or VIH VIN = VIL or VIH µA V IOL 12 mA IOL 24 mA IOL 24 mA (Note I = VCC, GND V OLD = 1.65V Max V OHD = 3.85V Min IN = VCC or GND V IOUT µA V IOH -12 mA IOH -24 mA IOH -24 mA (Note 2) V IOUT µA V OUT 0.1V or VCC 0.1V V Units Conditions VOUT 0.1V or VCC - 0.1V
Note 2: All outputs loaded; thresholds on input associated with output under test. Note 3: Maximum test duration 2.0 ms, one output loaded at a time. Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.
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