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Details, datasheet, quote on part number:74ACTQ16646
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Datasheet text preview:
74ACTQ16646 16-Bit Transceiver/Register with 3-STATE Outputs
June 1991 Revised January 1999
74ACTQ16646 16-Bit Transceiver/Register with 3-STATE Outputs
General Description
The ACTQ16646 contains sixteen non-inverting bidirectional registered bus transceivers providing multiplexed transmission of data directly from the input bus or from the internal storage registers. Each byte has separate control inputs which can be shorted together for full 16-bit operation. The DIR inputs determine the direction of data flow through the device. The CPAB and CPBA inputs load data into the registers on the LOW-to-HIGH transition. The ACTQ16646 utilizes Fairchild Quiet SeriesTM technology to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet SeriesTM features GTOTM output control and undershoot corrector for superior performance.
Features
s Utilizes Fairchild FACT Quiet Series technology s Guaranteed simultaneous switching noise level and dynamic threshold performance s Guaranteed pin-to-pin output skew s Independent registers for A and B buses s Multiplexed real-time and stored data transfers s Separate control logic for each byte s 16-bit version of the ACTQ646 s Outputs source/sink 24 mA s Additional specs for Multiple Output Switching s Output loading specs for both 50 pF and 250 pF loads
Ordering Code:
Order Number 74ACTQ16646SSC 74ACTQ16646MTD Package Number MS56A MTD56 Package Description 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300" Wide 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Logic Symbol
Connection Diagram
Pin Assignment for SSOP and TSSOP
FACTTM, Quiet SeriesTM, FACT Quiet SeriesTM and GTOTM are trademarks of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation
DS010937.prf
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74ACTQ16646
Function Table
Inputs G1 H H H L L L L L L L L DIR1 X X X H H H H L L L L CPAB1 CPBA1 SAB1 H or L X SBA1 X X X X X X X L L H H Output Input Input Input Input Data I/O (Note 1) A0 7 B0 7 Isolation Clock An Data into A Register Clock Bn Data Into B Register An to Bn--Real Time (Transparent Mode) Output Clock An Data to A Register A Register to Bn (Stored Mode) Clock An Data into A Register and Output to Bn Bn to An--Real Time (Transparent Mode) Clock Bn Data into B Register B Register to An (Stored Mode) Clock Bn into B Register and Output to An X X X L L H H X X X X Output Operation Mode
X X X X X
H or L
X X X X X
H or L
H or L
X
H = HIGH Voltage Level L = LOW Voltage Level
X = Immaterial = LOW-to-HIGH Transition.
Note 1: The data output functions may be enabled or disabled by various signals at the G and DIR inputs. Data input functions are always enabled; i.e., data at the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs. Also applies to data I/O (A and B: 8-15) and #2 control pins.
Real Time Transfer A-Bus to B-Bus
Storage from Bus to Register
Real Time Transfer B-Bus to A-Bus
Transfer from Register to Bus
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74ACTQ16646
Logic Diagram
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74ACTQ16646
Absolute Maximum Ratings(Note 2)
Supply Voltage (VCC) DC Input Diode Current (IIK) VI = -0.5V VI = VCC + 0.5V DC Output Diode Current (IOK) VO = -0.5V VO = VCC + 0.5V DC Output Voltage (VO) DC Output Source/Sink Current (IO) DC VCC or Ground Current per Output Pin Storage Temperature ±50 mA -65°C to +150°C -20 mA +20 mA -0.5V to VCC + 0.5V ±50 mA -20 mA +20 mA -0.5V to +7.0V
Recommended Operating Conditions
Supply Voltage (VCC) Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Minimum Input Edge Rate (V/t) VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V
Note 2: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACTTM circuits outside databook specifications.
4.5V to 5.5V 0V to VCC 0V to VCC -40°C to +85°C 125 mV/ns
DC Electrical Characteristics
Symbol VIH VIL VOH Parameter Minimum HIGH Input Voltage Maximum LOW Input Voltage Minimum HIGH Output Voltage V CC (V) 4.5 5 .5 4 .5 5 .5 4.5 5 .5 4.5 5.5 VOL Maximum LOW Output Voltage 4 .5 5 .5 4.5 5.5 IOZT IIN ICCT ICC IOLD IOHD VOLP VOLV VOHP VOHV VIHD VILD Maximum I/O Leakage Current Maximum Input Leakage Current Maximum ICC/Input Max Quiescent Supply Current Minimum Dynamic Output Current (Note 4) Quick Output Maximum Dynamic VOL Quick Output Minimum Dynamic VOL Maximum Overshoot Minimum VCC Droop Minimum HIGH Dynamic Input Voltage Level Maximum LOW Dynamic Input Voltage Level
Note 3: All outputs loaded; thresholds associated with output under test. Note 4: Maximum test duration 2.0 ms; one output loaded at a time. Note 5: Worst case package.
TA = +25°C Typ 1 .5 1.5 1 .5 1.5 4.49 5.49 2.0 2 .0 0 .8 0 .8 4 .4 5.4 3 .86 4 .86 0.001 0.001 0 .1 0 .1 0 .36 0 .36 ± 0.5 ± 0.1 0.6 8 .0
TA = -40°C to+85°C Guaranteed Limits 2 .0 2.0 0 .8 0.8 4.4 5 .4
Units V V V
Conditions VOUT = 0.1V or VCC - 0.1V VOUT = 0.1V or VCC - 0.1V IOUT = -50 µA VIN = VIL or VIH
3 .76 4 .76 0.1 0.1
V V
IOH = -24 mA IOH = -24 mA (Note 3) IOUT = 50 µA VIN = VIL or VIH
0 .44 0 .44 ± 5.0 ± 1.0 1 .5 80.0 75 - 75
V µA µA mA µA mA mA V V V V V V
IOL = 24 mA IOL = 24 mA (Note 3) VIN = VIL, VIH VO = VCC, GND VI = VCC, GND VI = VCC - 2.1V VIN = VCC or GND VOLD = 1.65V Max VOHD = 3.85V Min Figure 1, Figure 2 (Note 6)(Note 7) Figure 1, Figure 2 (Note 6)(Note 7) Figure 1, Figure 2 (Note 5)(Note 7) Figure 1, Figure 2 (Note 5)(Note 7) (Note 5)(Note 8) (Note 5)(Note 8)
5 .5 5.5 5 .5 5.5 5.5 5.0 5.0 5 .0 5 .0 5.0 5.0 0 .5 -0.5 VOH + 1.0 VOH - 1.0 1.7 1.2
0.8 - 0 .8 VOH + 1.5 VOH - 1.8 2.0 0.8
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74ACTQ16646
DC Electrical Characteristics
(Continued)
Note 6: Maximum number of outputs that can switch simultaneously is n. (n - 1) outputs are switched LOW and one output held LOW. Note 7: Maximum number of outputs that can switch simultaneously is n. (n - 1) outputs are switched HIGH and one output held HIGH. Note 8: Maximum number of data inputs (n) switching. (n - 1) inputs switching 0V to 3V (ACTQ). Input under test switching 3V to threshold (VILD).
AC Electrical Characteristics
VCC Symbol Parameter (V) (Note 9) tPHL tPLH tPHL tPLH tPHL tPLH tPZL tPZH tPLZ tPHZ tPZL tPZH tPLZ tPHZ Propagation Delay Clock to Bus Propagation Delay Bus to Bus Propagation Delay Select to Bus (w/An or Bn HIGH or LOW) Enable Time G to An/Bn Disable Time G to An/Bn Enable Time DIR to An/Bn Disable Time DIR to An/Bn 5.0 5.0 5.0 5.0 5.3 4 .6 3.0 3 .4 5.1 4 .6 2.9 3 .4 7.8 6.9 5.5 5.7 8.2 7.5 5.8 6.1 10.5 9 .4 8.1 8 .3 11.8 10.8 9.2 9 .2 3.8 3.3 2.3 2.6 4.3 3 .7 2.0 2.5 11.4 10.2 8.6 8.6 12.7 11.7 9.8 9.7 ns ns ns ns 5 .0 5.0 5.0 Min 4 .6 4 .3 4 .0 4 .1 4.0 4 .2 TA = +25°C CL = 50 pF Typ 6.9 6.5 6.2 6.4 6.4 6.7 Max 9 .4 8 .9 8 .5 8 .6 8.9 9 .5 TA = -40°C to +85°C CL = 50 pF M in 3.6 3.3 2.9 3.2 3 .1 3.2 Max 10.1 9.7 9.2 9.3 9.6 10.4 ns ns ns Units
Note 9: Voltage Range 5.0 is 5.0V ± 0.5V.
AC Operating Requirements
V CC Symbol tS tH tW Parameter Setup Time, H or L Bus to Clock Hold Time, H or L Bus to Clock Clock Pulse Width H or L
Note 10: Voltage Range 5.0 is 5.0V ± 0.5V.
TA = +25°C CL = 50 pF 3.0 1 .5 4.0
TA = -40°C to +85°C CL = 50 pF 3.0 1.5 4.0 Units ns ns ns
(V) (Note 10) 5 .0 5.0 5 .0
Guaranteed Minimum
5
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