|
Details, datasheet, quote on part number:74F379SJ
| |
Datasheet text preview:
74F379 Quad Parallel Register with Enable
May 1988 Revised October 2000
74F379 Quad Parallel Register with Enable
General Description
The 74F379 is a 4-bit register with buffered common Enable. This device is similar to the 74F175 but features the common Enable rather than common Master Reset.
Features
s Edge triggered D-type inputs s Buffered positive edge-triggered clock s Buffered common enable input s True and complement outputs
Ordering Code:
Order Number 74F379SC 74F379SJ 74F379PC Package Number M16A M16D N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
© 2000 Fairchild Semiconductor Corporation
DS009527
www.fairchildsemi.com
74F379
Unit Loading/Fan Out
U.L . Pin Names E D0D3 CP Q0Q3 Q0Q3 Description HIGH/LOW Enable Input (Active LOW) Data Inputs Clock Pulse Input (Active Rising Edge) Flip-Flop Outputs Complement Outputs 1.0/1.0 1.0/1.0 1.0/1.0 50/33.3 50/33.3 Input IIH/IIL Output IOH/IOL 20 µA/-0.6 mA 20 µA/-0.6 mA 20 µA/-0.6 mA
-1 mA/20 mA -1 mA/20 mA
Functional Description
The 74F379 consists of four edge-triggered D-type flipflops with individual D inputs and Q and Q outputs. The Clock (CP) and Enable (E) inputs are common to all flipflops. When the E is input HIGH, the register will retain the present data independent of the CP input. The Dn and E inputs can change when the clock is in either state, provided that the recommended setup and hold times are observed.
Truth Table
Inputs E H L L CP Outputs Dn X H L Qn NC H L Qn NC L H
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial = LOW-to-HIGH Transition NC = No Change
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.fairchildsemi.com
2
74F379
Absolute Maximum Ratings(Note 1)
Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output in LOW State (Max) ESD Last Passing Voltage (Min) twice the rated IOL (mA) 4000V
-65°C to +150°C -55°C to +125°C -55°C to +150°C -0.5V to +7.0V -0.5V to +7.0V -30 mA to +5.0 mA
Recommended Operating Conditions
Free Air Ambient Temperature Supply Voltage 0°C to +70°C
+4.5V to +5.5V
-0.5V to VCC -0.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol VIH VIL VCD VOH VOL IIH IBVI ICEX VID IOD IIL IOS ICCL Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current Output Short-Circuit Current Power Supply Current -60 28 4.75 3.75 -0.6 -150 40 10% VCC 5% VCC 10% VCC 2.5 2.7 0.5 5.0 7.0 50 M in 2.0 0.8 -1.2 Typ Max Units V V V V V µA µA µA V µA mA mA mA Min Min Min Max Max Max 0 .0 0 .0 Max Max Max V CC Conditions Recognized as a HIGH Signal Recognized as a LOW Signal IIN = -18 mA IOH = -1 mA IOH = -1 mA IOL = 20 mA VIN = 2.7V VIN = 7.0V VOUT = VCC IID = 1.9 µA All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded VIN = 0.5V VOUT = 0V VO = LOW
3
www.fairchildsemi.com
74F379
AC Electrical Characteristics
TA = +25°C Symbol Parameter Min fMAX tPLH tPHL Maximum Clock Frequency Propagation Delay CP to Qn, Qn 100 3 .5 5.0 VCC = +5.0V CL = 50 pF Typ 140 5.0 6 .5 6.5 8.5 Max TA = -55°C to +125°C VCC = +5.0V CL = 50 pF M in 75 3.0 4 .0 8 .5 10.0 Max TA = 0°C to +70°C VCC = +5.0V CL = 50 pF M in 100 3.5 5.0 7 .5 9.5 Max MHz ns Units
AC Operating Requirements
TA = +25°C Symbol Parameter VCC = +5.0V Min tS(H) tS(L) tH(H) tH( L ) tS(H) tS(L) tH (H) tH( L ) tW(H) tW(L) Setup Time, HIGH or LOW Dn to CP Hold Time, HIGH or LOW Dn to CP Setup Time, HIGH or LOW E to CP Hold Time, HIGH or LOW E to CP CP Pulse Width HIGH or LOW 3.0 3.0 1 .0 1.0 6.0 6.0 0 0 4 .0 5 .0 Max TA = -55°C to +125°C VCC = +5.0V M in 4.0 4 .0 2.0 2 .0 8.0 8 .0 0 0 5 .0 7.0 M ax TA = 0°C to +70°C VCC = +5.0V Min Max 3.0 3.0 1 .0 1.0 6.0 6.0 0 0 4 .0 5 .0 ns ns ns Units
www.fairchildsemi.com
4
74F379
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A
5
www.fairchildsemi.com
|
|
