This device contains four independent gates, each of which performs the logic NAND function. The open-collector outputs require external pull-up resistors for proper logical operation.

Order Number 74F38SJ 74F38PC Package Number M14D N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

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Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCCPin Potential to Ground Pin Input Voltage (Note 3) Input Current (Note 3) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA)

Note 2: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 3: Either voltage limit or current limit is sufficient to protect inputs.

Symbol VIH VIL VCD VOL IIH IBVI VID IOD IIL IOHC ICCH ICCL Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Input Leakage Test Output Leakage Circuit Current Input LOW Current Open Collector, Output OFF Leakage Test Power Supply Current Power Supply Current µA mA Max 0.0 Max Min Max VIN = 2.7V VIN = 7.0V IID 1.9 µA All Other Pins Grounded VIOD 150 mV All Other Pins Grounded VIN = 0.5V VOUT = VCC VO = HIGH VO = LOW 10% VCC Min Typ Max Units Min VCC Conditions Recognized as a HIGH Signal Recognized as a LOW Signal IIN -18 mA IOL 64 mA

= +25°C Symbol Parameter Min tPLH tPHL Propagation Delay An, 6.5 1.5 VCC 50 pF Typ 9.7 2.1 Max to +70°C VCC 50 pF Min 6.5 1.5 Max 5.5 ns Units