|Category||Logic => Bus Interface => Bus Oriented Circuits|
|Title||Bus Oriented Circuits|
|Description||Octal Registered Transceiver|
|Datasheet||Download 74F544 datasheet
The 74F544 octal transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting in either direction of data flow. The A outputs are guaranteed to sink 24 mA while the B outputs are rated for 64 mA. The 74F544 inverts data in both directions.Features
s 8-bit octal transceiver s Back-to-back registers for storage s Separate controls for data flow in each direction s A outputs sink 24 mA, B outputs sink 64 mA
Order Number 74F544MSA 74F544SPC Package Number MSA24 N24C Package Description 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
U.L. Pin Names OEAB OEBA CEAB CEBA LEAB LEBA A0A7 Description HIGH/LOW A-to-B Output Enable Input (Active LOW) B-to-A Output Enable Input (Active LOW) A-to-B Enable Input (Active LOW) B-to-A Enable Input (Active LOW) A-to-B Latch Enable Input (Active LOW) B-to-A Latch Enable Input (Active LOW) A-to-B Data Inputs or B-to-A 3-STATE Outputs B0B7 B-to-A Data Inputs or A-to-B 3-STATE Outputs Input IIH/IIL Output IOH/IOL µA/-650 µA
The 74F544 contains two sets of eight D-type latches, with separate input and output controls for each set. For data flow from to B, for example, the A-to-B Enable (CEAB) input must be LOW in order to enter data from A0A7 or take data from B0B7, as indicated in the Data I/O Control Table. With CEAB LOW, a LOW signal on the A-to-B Latch Enable (LEAB) input makes the A-to-B latches transparent; a subsequent LOW-to-HIGH transition of the LEAB signal puts the A latches in the storage mode and their outputs no longer change with the A inputs. With CEAB and OEAB both LOW, the 3-STATE B output buffers are active and reflect the data present at the output of the A latches. Control of data flow from A is similar, but using the CEBA, LEBA and OEBA inputs.Inputs CEAB LEAB OEAB Latch Status Latched Transparent Output Buffers High Z High Z Driving
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Note: A-to-B data flow shown; B-to-A flow control is the same, except using CEBA, LEBA and OEBA
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA)
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Symbol VIH VIL VCD Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Min VCC 10% VCC 10% VCC 5% VCC 5% VCC VOL Output LOW Voltage IIH Input HIGH Current IBVI Input HIGH Current Breakdown Test IBVIT Input HIGH Current Breakdown (I/O) ICEX VID IOD Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current IIL IIH + IOZH IIL + IOZL IOS Input LOW Current Output Leakage Current Output Leakage Current Output Short-Circuit Current -60 -100 IZZ ICCH ICCL ICCZ Bus Drainage Test Power Supply Current Power Supply Current Power Supply Current VCC 10% VCC V µA Min V Min Typ Max Units V Min VCC Conditions Recognized as a HIGH Signal Recognized as a LOW Signal IIN = -18 mA, (except An, Bn) IOH -1 mA (An) IOH -3 mA (An, Bn) IOH -15 mA (Bn) IOH -1 mA (An) IOH -3 mA (An, Bn) IOL 24 mA (An) IOL 64 mA (Bn) VIN = 2.7V (except An, Bn) VIN = 7.0V (except An, Bn) VIN = 5.5V (An, Bn) VOUT = VCC (An, Bn) IID 1.9 µA All Other Pins Grounded VIOD 150 mV All Other Pins Grounded VIN = 0.5V (OEAB, OEBA) VIN = 0.5V (CEAB, CEBA) VOUT = 2.7V (An, Bn) VOUT = 0.5V (An, Bn) VOUT = 0V (An) VOUT = 0V (Bn) VOUT = 5.25V (An, Bn) VO = HIGH VO = LOW VO = HIGH Z
|Related products with the same datasheet|
|Some Part number from the same manufacture Fairchild Semiconductor|
|74F544MSA Octal Registered Transceiver|
|74F545 Octal Bidirectional Transceiver With 3-STATE Inputs/outputs|
|74F552 Octal Registered Transceiver With Parity And Flags|
|74F563 Octal D-type Latch With 3-STATE Outputs|
|74F564 Octal D-type Flip-flop With 3-STATE Outputs|
|74F569 4-Bit Bidirectional Decade Counter With 3-STATE Outputs|
|74F573 Octal D-type Latch With 3-STATE Outputs|
|74F574 Octal D-type Flip-flop With 3-STATE Outputs|
|74F579 8-Bit Bidirectional Binary Counter With 3-STATE Outputs|
|74F583 4-Bit BCD Adder|
|74F620 Inverting Octal Bus Transceiver With 3-STATE Outputs|
|74F64 4-2-3-2-Input And/or Invert Gate|
|74F640 Octal Bus Transceiver With 3-STATE Outputs|
|74F646 Octal Bus Transceiver And Register With 3-STATE Outputs|
2N3904RA : Amplifier NPN General Purpose Amplifier
74VHC393MX : CMOS/BiCMOS->VHC/VHCT/74V1 Family->Low Voltage Dual 4-Bit Binary Counter
DM74ALS257N : Multiplexers->Bipolar->ALS Family 3-STATE Quad 1-of-2 Line Data Selector/multiplexer
HGTG10N120BND : 35A, 1200V, NPT Series N-channel Igbt With Anti-parallel Hyperfast Diode
MC79L15ACD : 3-Terminal 1A Negative Voltage Regulator
X5325 : Watchdog Cpu Supervisor With Selectable Watchdog Timer, Adjustable Low Voltage Reset, Active High, Spi EePROM
QSB34GR_07 : Surface Mount Silicon Pin Photodiode
BSR16D87Z : PNP, Si, SMALL SIGNAL TRANSISTOR, TO-236AB Specifications: Polarity: PNP
5962-9051401M2A : Standard Transceivers. ti SN54BCT245, Octal Bus Transceivers With 3-State Outputs.
74AC11158 : CMOS/BiCMOS->AC/ACT Family. Quadruple 2-line to 1-line Data Selector/multiplexer.
74HC259 : 74HC/HCT259; 8-bit Addressable Latch;; Package: SOT109-1 (SO16), SOT338-1 (SSOP16), SOT38-4 (DIP16), SOT403-1 (TSSOP16).
74VCX32500 : CMOS/BiCMOS->LVT/ALVT/LCX/LPT Family->Low Voltage. Low Voltage 36-Bit Universal Bus Transceivers With 3.6V Tolerant Inputs And Outputs.
CD74ACT157 : Multiplexers->CMOS/BiCMOS->AC/ACT Family. Quad 2-input Multiplexers.
DM74S373 : Bipolar->S Family. 3-STATE Octal D-type Transparent Latches And Edge-triggered Flip-flops.
MC10H352 : Bipolar->ECL 10 Family. Quad CMOS to Pecl* Translator. The is a quad translator for interfacing data between a CMOS logic section and the PECL section of digital systems when only a +5.0 Vdc power supply is available. The MC10H352 has CMOS compatible inputs and PECL complementary openemitter outputs that allow use as an inverting/noninverting translator as a differential line driver. When the common strobe.
SN54LVC74AFK : Dual Positive-edge-triggered D-type Flip-flops With Clear And Preset. SN54LVC74A, SN74LVC74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET EPIC TM (Enhanced-Performance Implanted CMOS) Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model = 200 pF, = 0) Latch-Up Performance Exceeds 250 mA Per JESD 17 Typical VOLP (Output Ground Bounce) V at VCC = 25°C.
SN74196N : ti SN74196, Asynchronous Decade Counters.
SN74ALS2541 : Bus Oriented Circuits. Octal Line Driver/mos Driver With 3-state Outputs.
SN74AS244ADW : Non-Inverting Buffers and Drivers. ti SN74AS244A, Octal Buffers/drivers With 3-State Outputs.
TC4052 : CMOS/BiCMOS->4000 Family. CMOS Differential 4-channel Multiplexer/demultiplexer.
TC74HC07 : CMOS/BiCMOS->HC/HCT Family. Hex Buffer (open Drain).
TC7S14 : CMOS/BiCMOS->AC/ACT Family. High Speed CMOS Schmitt Inverter.
TC74HC112AF(TP1) : HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16. s: Flip-Flop Type: J-K ; Triggering: Negative-edge Triggered ; Supply Voltage: 5V ; Output Characteristics: Complementary Output ; Propagation Delay: 31 ns ; fMAX: 32 MHz ; Operating Temperature: -40 to 85 C (-40 to 185 F) ; Package Type: 0.300 INCH, PLASTIC, SOIC-16,.
74HC194D/T3 : HC/UH SERIES, 4-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16. s: Register Type: Parallel In / Parallel Out ; Shift Direction: Bidirectional ; Supply Voltage: 5V ; Package Type: Other, MINI, PLASTIC, SO-16 ; Logic Family: CMOS ; Pin Count: 16 ; Number of units in IC: 1 ; Number of Bits (Stages): 4 ; Clock Frequency:.