|Category||Logic => Gates => Complex Gates => Bipolar->F Family|
|Description||4-2-3-2-Input And/or Invert Gate|
|Datasheet||Download 74F64 datasheet
This device contains gates configured to perform a 4-2-3-2 input AND-OR-INVERT function.
Order Number 74F64SJ 74F64PC Package Number M14D N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
U.L. Pin Names An, Bn, Cn, Dn O Description HIGH/LOW Inputs Output 1.0/1.0 50/33.3 Input IIH/IIL Output IOH/IOL µA/-0.6 mA
Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA)
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Symbol VIH VIL VCD VOH VOL IIH IBVI ICEX VID IOD IIL IOS ICCH ICCL Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Output High Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current Output Short-Circuit Current Power Supply Current Power Supply Current 10% VCC 5% VCC 10% VCC µA mA Min Max 0.0 Max Parameter Units Min VCC Conditions Recognized as a HIGH Signal Recognized as a LOW Signal IIN -18 mA IOH -1 mA IOH -1 mA IOL 20 mA VIN = 2.7V VIN = 7.0V VOUT = VCC IID 1.9 µA All Other Pins Grounded VIOD 150 mV All Other Pins Grounded VIN = 0.5V VOUT VO = HIGH VO = LOW
= +25°C Symbol Parameter Min tPLH tPHL Propagation Delay An, Bn, Cn, 2.5 1.5 VCC 50 pF Typ 4.6 3.2 Max 6.5 4.5 Min 2.5 1.5 Max 50 pF UnitsPhysical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow Package Number M14A
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