|Category||Logic => Bus Interface => Bus Oriented Circuits|
|Title||Bus Oriented Circuits|
|Description||Octal Bus Transceiver And Register With 3-STATE Outputs|
|Datasheet||Download 74F646 datasheet
These devices consist of bus transceiver circuits with 3-STATE, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the or B bus will be clocked into the registers as the appropriate clock pin goes to a high logic level. Control G and direction pins are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or the B register or in both. The select controls can multiplex stored and real-time (transparent mode) data. The direction control determines which bus will receive data when the enable control G is Active LOW. In the isolation mode (control G HIGH), A data may be stored in the B register and/or B data may be stored in the A register.Features
s Independent registers for A and B buses s Multiplexed real-time and stored data s 74F648 has inverting data paths s 74F646/74F646B have non-inverting data paths is a faster version of the s 3-STATE outputs s 300 mil slim DIP
Order Number 74F648SC 74F648SPC Package Number M24B N24C Package Description 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Pin Names A0A7 B0B7 CPAB, CPBA SAB, SBA G DIR Description Data Register A Inputs/ 3-STATE Outputs Data Register B Inputs/ 3-STATE Outputs Clock Pulse Inputs Select Inputs Output Enable Input Direction Control Input U.L. HIGH/LOW Input IIH/IIL Output IOH/IOL µA/-650 µA
Inputs DIR CPAB CPBA SAB L X SBA Output Input Data I/O (Note A0A7 B0B7 Isolation Clock An Data into A Register Clock Bn Data into B Register An to Bn--Real Time (Transparent Mode) Output Clock An Data into A Register A Register to Bn (Stored Mode) Clock An Data into A Register and Output Bn to An--Real Time (Transparent Mode) Clock Bn Data into B Register B Register to An (Stored Mode) Clock Bn Data into B Register and Output to An FunctionH = HIGH Voltage Level L = LOW Voltage Level X = Irrelevant = LOW-to-HIGH Transition
Note 1: The data output functions may be enabled or disabled by various signals at the G and DIR Inputs. Data input functions are always enabled; i.e., data at the bus pins will be stored on every LOW-to-HIGH transition of the clock inputs.
|Related products with the same datasheet|
|Some Part number from the same manufacture Fairchild Semiconductor|
|74F646B Octal Bus Transceiver And Register With 3-STATE Outputs|
|74F64PC 4-2-3-2-Input And/or Invert Gate|
|74F657 Octal Bidirectional Transceiver With 8-Bit Parity Generator/checker And 3-STATE Outputs|
|74F673A 16-Bit Serial-in Serial/parallel-out Shift Register|
|74F676 16-Bit Serial/parallel-in Serial-out Shift Register|
|74F74 Dual D-type Positive Edge-triggered Flip-flop|
|74F779 8-Bit Bidirectional Binary Counter With 3-STATE Outputs|
|74F794 8-Bit Register With Read Back|
|74F821 10-Bit D-type Flip-flop|
|74F823 9-Bit D-type Flip-flop|
|74F825 8-Bit D-type Flip-flop|
|74F827 10-Bit Buffer/line Driver|
|74F841 10-Bit Transparent Latch|
54AC646 : Military/Aerospace->FACT AC. 54AC646 - Octal Bus Transceiver And Register With Tri-state Outputs, Package: Lcc, Pin Nb=28.
74HC/HCT21 : CMOS/BiCMOS->HC/HCT Family. Dual 4-input And Gate. For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family s The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines Product File under Integrated Circuits, IC06 December 1990 Output capability: standard ICC category: SSI GENERAL The 74HC/HCT21 are high-speed Si-gate CMOS.
74LVC1G14 : 74LVC1G14; Single Schmitt-trigger Inverter;; Package: SOT353 (UMT5), SOT753.
74VHCT05AT : Hex Inverter ( Open Drain ). HIGH SPEED: tPD 3.2 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC 2 µA (MAX.) 25 oC COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS OPERATING VOLTAGE RANGE: VCC (OPR) to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 05 IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.8V (Max.) ORDER CODES 74VHCT05AM 74VHCT05AT.
84135012A : Multiplexers. ti SN54ALS251, 1-Of-8 Data Selectors/multiplexers With 3-State Outputs.
9328 : Bipolar->TTL Family. Dual 8-bit Shift Register. The is a high speed serial storage element providing 16 bits of storage in the form of two 8-bit registers. The multifunctional capability of this device is provided by several : 1) additional gating is provided at the input to both shift registers so that the input is easily multiplexed between two sources; 2) the clock of each register may be provided.
AVGDV74LS166N : 8 Bit Shift Register, Plastic Dip, Through Hole.
HEF4070B : HEF4070B Gates; Quadruple Exclusive-OR GATE;; Package: SOT108-1 (SO14), SOT27-1 (DIP14).
NL27WZ16DFT2 : 2-Gate. Dual Buffer, Package: SC-88 (SOT-363), Pins=6. The is a high performance dual buffer operating from 5.5 V supply. At VCC 3 V, high impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. Extremely High Speed: tPD 2.0 ns (typical) at VCC 5 V Designed for 5.5 V VCC Operation Over Voltage Tolerant.
PI74AVC+16601 : 18-Bit Universal Bus Transceiver. PI74AVC+16601 is designed for low voltage operation, VCC to 3.6V True ±24mA Balanced Drive @ 3.3V IOFF supports partial power-down operation 3.6V I/O Tolerant Inputs and Outputs All outputs contain noise reduction circuitry reducing noise without speed degradation Industrial operation to +85°C Available Packages: 56-pin 240 mil wide plastic TSSOP (A) 56-pin.
SL74HC14 : Hex Schmitt-trigger Inverter. The SL74HC14 is identical in pinout to the LS/ALS14, LS/ALS04. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. The SL74HC14 is useful to "square up" slow input rise and fall times. Due to the hysteresis voltage of the Schmitt trigger, the SL74HC14A finds applications in noisy.
SN74ABTH32318 : Bus Oriented Circuits. 18-bit Tri-port Universal Bus Exchangers. Members of the Texas Instruments Widebus+ TM Family State-of-the-Art EPIC-B TM BiCMOS Design Significantly Reduces Power Dissipation UBE TM (Universal Bus Exchanger) Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Mode Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output.
SN74AC533DB : Octal Transparent D-type Latches With 3-state Outputs. SN54AC533, SN74AC533 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS 3-State Inverting Outputs Drive Bus Lines Directly Full Parallel Access for Loading EPIC TM (Enhanced-Performance Implanted CMOS) 1-µm Process Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), Ceramic Chip Carriers.
SN74FB1653PCA : Backplane Logic (GTL, GTLP, FB/FB+, ABTE/ETL). ti SN74FB1653, 17-Bit Lvttl/btl Universal Storage Transceivers With Buffered Clock Lines.
SN74LVC1G125DBVR : Single Gates. ti SN74LVC1G125, Single Bus Buffer Gate With 3-State Outputs.
SN74LVC07A-EP : Enhanced Product Hex Buffer/Driver With Open-Drain Output This hex buffer/driver is designed for 1.65-V to 5.5-V VCC operation. The outputs of the SN74LVC07A device are open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 24 mA. Inputs can be driven.
SY58030UMY : 58030 SERIES, 8 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, QCC44. s: Output Characteristics: Complementary Output ; Supply Voltage: 2.5V ; Package Type: 7 X 7 MM, LEAD FREE, MO-220, MLF-44 ; Number of Pins: 44 ; Inputs: 8 ; Propagation Delay: 0.4500 ns ; Operating Temperature: -40 to 85 C (-40 to 185 F).
74AC11032DBE4 : AC SERIES, QUAD 2-INPUT OR GATE, PDSO16. s: Gate Type: OR ; Supply Voltage: 5V ; Logic Family: CMOS ; Inputs: 2 ; Propagation Delay: 9.7 ns ; Operating Temperature: -40 to 85 C (-40 to 185 F) ; Pin Count: 16.
74HC165BQ : HC/UH SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PQCC16. s: Register Type: Parallel In / Serial Out ; Shift Direction: Right ; Supply Voltage: 5V ; Package Type: Other, 2.50 X 3.50 MM, 0.85 MM HEIGHT, PLASTIC, MO-241, SOT-763-1, DHVQFN-16 ; Logic Family: CMOS ; Pin Count: 16 ; Number of units in IC: 1 ; Number of Bits.