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Part: 74F841
Category:
Logic
-> Latches
-> Bipolar->F Family
Description: 10-Bit Transparent Latch
Company: Fairchild Semiconductor
Datasheet: Download 74F841 datasheet File size : 180 kB
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Datasheet text preview:
74F841 10-Bit Transparent Latch
March 1988 Revised October 2000
74F841 10-Bit Transparent Latch
General Description
The 74F841 bus interface latch is designed to eliminate the extra packages required to buffer existing latches and provide extra data width for wider address/data paths or buses carrying parity. The 74F841 is a 10-bit transparent latch, a 10-bit version of the 74F373.
Features
s 3-STATE output
Ordering Code:
Order Number 74F841SC 74F841SPC Package Number M24B N24C Package Description 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
© 2000 Fairchild Semiconductor Corporation
DS009599
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74F841
Unit Loading/Fan Out
Pin Names D0 D9 O0O9 OE LE Description Data Inputs 3-STATE Outputs Output Enable Input Latch Enable U.L . HIGH/LOW 1.0/1.0 150/40 1.0/1.0 1.0/1.0 Input IIH/IIL Output IOH/IOL 20 µA/-0.6 mA
-3 mA/24 mA
20 µA/-0.6 mA 20 µA/-0.6 mA
Functional Description
The 74F841 device consists of ten D-type latches with 3-STATE outputs. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. This allows asynchronous operation, as the output transition follows the data in transition. On the LE HIGH-to-LOW transition, the data that meets the setup and hold time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH the bus output is in the high impedance state.
Function Table
Inputs OE X H H H L L L L L L H H LE X H H L H H L X X X L L D X L H X L H X X X X X X Internal Q X L H NC L H NC H L H L H Output Function O Z Z Z Z L H NC H L H Z Z High Z High Z High Z Latched Transparent Transparent Latched Preset Clear Preset Latched Latched
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = HIGH Impedance NC = No Change
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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74F841
Absolute Maximum Ratings(Note 1)
Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA)
-65°C to +150°C -55°C to +125°C -55°C to +150°C -0.5V to +7.0V -0.5V to +7.0V -30 mA to +5.0 mA
Recommended Operating Conditions
Free Air Ambient Temperature Supply Voltage 0°C to +70°C
+4.5V to +5.5V
-0.5V to VCC -0.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol VIH VIL VCD VOH Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage 10% VCC 10% VCC 5% VCC 5% VCC VOL IIH IBVI ICEX VID IOD IIL IOZH IOZL IOS IZZ ICCZ Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current Output Leakage Current Output Leakage Current Output Short-Circuit Current Bus Drainage Test Power Supply Current 69 -60 4.75 3.75 -0.6 50 -50 -150 500 92 10% VCC 2.5 2.4 2.7 2.7 0.5 5.0 7.0 50 V µA µA µA V µA mA µA µA mA µA mA Min Max Max Max 0 .0 0 .0 Max Max Max Max 0.0V Max V Min M in 2.0 0.8 -1.2 Typ Max Units V V V Min V CC Conditions Recognized as a HIGH Signal Recognized as a LOW Signal IIN = -18 mA IOH = -1 mA IOH = -3 mA IOH = -1 mA IOH = -3 mA IOL = 24 mA VIN = 2.7V VIN = 7.0V VOUT = VCC IID = 1.9 µA All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded VIN = 0.5V VOUT = 2.7V VOUT = 0.5V VOUT = 0V VOUT = 5.25V VO = HIGH Z
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74F841
AC Electrical Characteristics
TA = +25°C Symbol Parameter Min tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation Delay Dn to On Propagation Delay LE to On Output Enable Time OE to On Output Disable Time OE to On 2.5 1.5 5.0 2.0 2.5 2.5 1.0 1.0 VCC = +5.0V CL = 50 pF Typ Max 8.0 6 .5 12.0 7 .5 8.5 9 .0 6.5 6 .5 TA = 0°C to +70°C VCC = +5.0V CL = 50 pF Min 2.0 1.5 4.5 2.0 2.0 2.0 1.0 1.0 Max 9.0 7.0 13.5 8.0 9.5 10.0 7.5 7.5 ns ns ns Units
AC Operating Requirements
TA = +25°C Symbol Parameter VCC = +5.0V Min tS(H) tS(L) tH(H) tH(L) tW(H) Setup Time, HIGH or LOW Dn to LE Hold Time, HIGH or LOW Dn to LE LE Pulse Width, HIGH 2.0 2.0 2.5 3.0 4.0 M ax TA = 0°C to +70°C VCC = +5.0V Min 2.5 2 .5 3.0 3 .5 4 .0 ns ns Max Units
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74F841
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M24B
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