|Category||Logic => Line Driver/Receivers => CMOS/BiCMOS->LVT/ALVT/LCX/LPT Family->Low Voltage|
|Title||CMOS/BiCMOS->LVT/ALVT/LCX/LPT Family->Low Voltage|
|Description||Low Voltage 16-Bit Buffer/line Driver With 26 Ohm Series Resistors in Outputs|
|Datasheet||Download 74LCX162244 datasheet
|Cross ref.||Similar parts: 74LCX16244T, PI74LCX16244A, PI74LCX16244V|
|74LCX162244 Low Voltage 16-Bit Buffer/Line Driver with 26 Series Resistors in Outputs
The LCX162244 contains sixteen non-inverting buffers with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. The LCX162244 is designed for low voltage or 3.3V) VCC applications with capability of interfacing a 5V signal environment. In addition, the outputs include equivalent 26 (nominal) series resistors to reduce overshoot and undershoot and are designed to sink/source mA at VCC = 3.0V. The LCX162244 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.Features
s 5V tolerant inputs and outputs s 2.3V3.6V VCC specifications provided s Outputs include equivalent series resistance 26 to make external termination resistors unnecessary and reduce overshoot and undershoot 5.3 ns tPD max (VCC 20 µA ICC max s Power down high impedance inputs and outputs ±12 mA output drive (VCC 3.0V) s Implements patented noise/EMI reduction circuitry s Latch-up performance exceeds mA s ESD performance: Human body model > 2000V Machine model 200V s Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) (Preliminary)
Order Number 74LCX162244GX (Note 1) 74LCX162244MEA (Note 2) 74LCX162244MTD (Note 2) Package Number BGA54A (Preliminary) MS48A MTD48 Package Description 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide [TAPE and REEL] 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 1: BGA package available in Tape and Reel only. Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.Pin Names OEn O0O15 NC Description Output Enable Input (Active LOW) Inputs Outputs No Connect
Inputs OE1 Pin Assignment for FBGA L H Inputs L H Inputs OE3 L (Top Thru View) L H Inputs L H
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance
The LCX162244 contains sixteen non-inverting buffers with 3-STATE standard outputs. The device is designed with 26 series resistors in the outputs. This design reduces line noise in applications such as memory address drivers, clock drivers and bus transceiver/transmitters. The device is nibble (4 bits) controlled with each nibble functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. The 3-STATE outputs are controlled by an Output Enable (OEn) input for each nibble. When OEn is LOW, the outputs are in 2-state mode. When OEn is HIGH, the outputs are in the high impedance mode, but this does not interfere with entering new data into the inputs.
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