|Category||Logic => Flip-Flops|
|Description||Low Voltage 16-Bit D-type Flip-flop With 5V Tolerant Inputs And Outputs And 26 Ohm Series Resistor|
|Datasheet||Download 74LCX162374 datasheet
|Cross ref.||Similar parts: 74LCX16374T, PI74LCX16374A, PI74LCX16374V|
74LCX162374 Low Voltage 16-Bit D-Type Flip-Flop with 5V Tolerant Inputs and Outputs and 26 Series Resistors
The LCX162374 contains sixteen non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock (CP) and Output Enable (OE) are common to each byte and can be shorted together for full 16-bit operation. The LCX162374 is designed for low voltage or 3.3V) VCC applications with capability of interfacing a 5V signal environment. The 26 series resistor in the output helps reduce output overshoot and undershoot. The LCX162374 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.Features
I 5V tolerant inputs and outputs I 2.3V3.6V VCC specifications provided I Equivalent 26 series resistor on outputs 7.0 ns tPD max (VCC 20 µA ICC max I Power down high impedance inputs and outputs I Supports live insertion/withdrawal (Note ±12 mA output drive (VCC 3.0V) I Implements patented noise/EMI reduction circuitry I Latch-up performance exceeds mA I ESD performance: Human body model > 2000V Machine model 200V I Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) (Preliminary)
Note 1: To ensure the high-impedance state during power up or down, OE should be tied to VCC through a pull-up resistor: the minimum value or the resistor is determined by the current-sourcing capability of the driver.
Order Number 74LCX162374GX (Note 2) 74LCX162374MEA (Note 3) 74LCX162374MTD (Note 3) Package Number BGA54A (Preliminary) MS48A MTD48 Package Description 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide [TAPE and REEL] 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 2: BGA package available in Tape and Reel only. Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Pin Names OEn CPn O0O15 NC Description Output Enable Input (Active LOW) Clock Pulse Input Inputs Outputs No ConnectPin Assignment for FBGA Inputs CP1 Outputs O0 Z Outputs Z OE1 Inputs CP2 (Top Thru View)
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance O0 = Previous O0 before HIGH-to-LOW of CP
The LCX162374 consists of sixteen edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. Each byte has a buffered clock and buffered Output Enable common to all flip-flops within that byte. The description which follows applies to each byte. Each flip-flop will store the state of their individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CPn) transition. With the Output Enable (OEn) LOW, the contents of the flip-flops are available at the outputs. When OEn is HIGH, the outputs go to the high impedance state. Operation of the OEn input does not affect the state of the flip-flops.
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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