|
|
Part: 74LCX257
Category:
Logic
-> Multiplexers/Demultiplexers
-> Multiplexers->CMOS/BiCMOS->LVT/ALVT/LCX/LPT Family
Description: Low Voltage Quad 2-Input Multiplexer With 5V Tolerant Inputs And Outputs
Company: Fairchild Semiconductor
Datasheet: Download 74LCX257 datasheet File size : 201 kB
Request For quote: Find where to buy 74LCX257
Datasheet text preview:
74LCX257 Low Voltage Quad 2-Input Multiplexer with 5V Tolerant Inputs and Outputs
May 1995 Revised September 2000
74LCX257 Low Voltage Quad 2-Input Multiplexer with 5V Tolerant Inputs and Outputs
General Description
The LCX257 is a quad 2-input multiplexer with 3-STATE outputs. Four bits of data from two sources can be selected using a Common Data Select input. The four outputs present the selected data in true (non inverted) form. The outputs may be switched to a high impedance state by placing a logic HIGH on the common Output Enable (OE) input, allowing the outputs to interface directly with bus-oriented systems. The 74LCX257 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs s 2.3V3.6V VCC specifications provided s 6.0 ns tPD max (VCC = 3.3V, In Zn), 10 µA ICC max s Power down high impedance inputs and outputs s Supports live insertion/withdrawal (Note 1) s Implements patented noise/EMI reduction circuitry s Latch-up performance exceeds 500 mA s ESD performance: Human body model > 2000V Machine model > 200V
Note 1: To ensure the high-impedance state during power up or down, OE should be tied to VCC through a pull-up resistor: the minimum value or the resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number 74LCX257M 74LCX257SJ 74LCX257MTC Package Number M16A M16D MTC16 Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names S OE I0aI0d I1aI1d ZaZd Description Common Data Select Input 3-STATE Output Enable Input Data Inputs from Source 0 Data Inputs from Source 1 3-STATE Multiplexer Outputs
© 2000 Fairchild Semiconductor Corporation
DS012466
www.fairchildsemi.com
74LCX257
Functional Description
The LCX257 is a quad 2-input multiplexer with 3-STATE outputs. It selects four bits of data from two sources under control of a Common Data Select input. When the Select input is LOW, the I0x inputs are selected and when Select is HIGH, the I1x inputs are selected. The data on the selected inputs appears at the outputs in true (non inverted) form. The device is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are shown below: Za = OE · (11a · S + I0a · S) Zb = OE · (11b · S + I0b · S) Zc = OE · (11c · S + I0c · S) Zd = OE · (11d · S + I0d · S) When the Output Enable (OE) is HIGH, the outputs are forced to a high impedance state. If the outputs are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. Designers should ensure the Output Enable signals to 3-STATE devices whose outputs are tied together are designed so there is no overlap.
Truth Table
Output Enable OE H L L L L
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance
Select Input S X H H L L I0 X X X L H
Data Inputs I1 X L H X X
Outputs
Z Z L H L H
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.fairchildsemi.com
2
74LCX257
Absolute Maximum Ratings(Note 1)
Symbol VCC VI VO IIK IOK IO ICC IGND TSTG Parameter Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Source/Sink Current DC Supply Current per Supply Pin DC Ground Current per Ground Pin Storage Temperature Value Conditions Units V V Output in 3-STATE Output in HIGH or LOW State (Note 2) VI VCC V mA mA mA mA mA
-0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 -5 0 -5 0 +5 0 ±5 0 ±100 ±100 -65 to +150
°C
Recommended Operating Conditions (Note 4)
Symbol VCC VI VO IOH/IOL Supply Voltage Input Voltage Output Voltage Output Current HIGH or LOW State 3-STATE VCC = 3.0V - 3.6V VCC = 2.7V - 3.0V VCC = 2.3V - 2.7V TA Free-Air Operating Temperature Input Edge Rate, VIN = 0.8V2.0V, VCC = 3.0V Parameter Operating Data Retention Min 2.0 1 .5 0 0 0 Max 3.6 3.6 5.5 VC C 5.5 Units V V V
±2 4 ±1 2 ±8 -4 0
0 85 10 mA
°C
ns/V
t/V
Note 2: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 3: IO Absolute Maximum rating must be observed. Note 4: Unused Inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol VIH VIL VOH Parameter HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage IOH = -100 µA IOH = -8 mA IOH = -12 mA IOH = -18 mA IOH = -24 mA VOL LOW Level Output Voltage IOL = 100 µA IOL = 8 mA IOL = 12 mA IOL = 16 mA IOL = 24 mA II IOZ IOFF Input Leakage Current 3-STATE Output Leakage Power-Off Leakage Current 0 VI 5.5V 0 VO 5.5V VI = V IH or VIL VI or VO = 5.5V Conditions VCC (V) 2.3 - 2.7 2.7 - 3.6 2.3 - 2.7 2.7 - 3.6 2.3 - 3.6 2.3 2.7 3.0 3.0 2.3 - 3.6 2.3 2.7 3.0 3.0 2.3 - 3.6 2.3 - 3.6 0 VCC - 0.2 1.8 2.2 2.4 2.2 0 .2 0 .6 0 .4 0 .4 0.55 ±5.0 ±5.0 10 µA µA µA V V TA = -40°C to +85°C M in 1.7 2.0 0 .7 0 .8 Max Units V V
3
www.fairchildsemi.com
74LCX257
DC Electrical Characteristics
Symbol ICC ICC Parameter Quiescent Supply Current Increase in ICC per Input
(Continued)
VCC (V) 2.3 - 3.6 2.3 - 3.6 2.3 - 3.6 TA = -40°C to +85°C M in Max 10 ± 10 500 µA µA
Conditions VI = VCC or GND 3.6V VI, VO 5.5V (Note 5) VIH = VCC -0.6V
Units
Note 5: Outputs disabled or 3-STATE only.
AC Electrical Characteristics
TA = -40°C to +85°C, RL = 500 Symbol Parameter VCC = 3.3V ± 0.3V CL= 50 pF Min tPHL tPLH tPHL tPLH tPZL tPZH tPLZ tPHZ tOSHL tOSLH Propagation Delay SZn Propagation Delay InZn Output Enable Time OE Zn Output Disable Time OE Zn Output to Output Skew (Note 6) 1 .5 1 .5 1 .5 1 .5 1.5 1 .5 1.5 1 .5 Max 7.0 7 .0 6.0 6 .0 7 .0 7 .0 5 .5 5 .5 1.0 1.0 VCC = 2.7V CL = 50 pF Min 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 M ax 8.5 8 .5 6.5 6 .5 8 .5 8 .5 6 .0 6 .0 VCC = 2.5V ± 0.2V CL= 30 pF Min 1 .5 1 .5 1 .5 1 .5 1.5 1 .5 1.5 1 .5 Max 9.1 9.1 7.2 7.2 9.1 9.1 6.6 6.6 ns ns ns ns ns Units
Note 6: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
Dynamic Switching Characteristics
Symbol VOLP VOLV Parameter Quiet Output Dynamic Peak VOL Quiet Output Dynamic Valley VOL Conditions CL = 50 pF, VIH = 3.3V, VIL = 0V CL = 30 pF, VIH = 2.5V, VIL = 0V CL = 50 pF, VIH = 3.3V, VIL = 0V CL = 30 pF, VIH = 2.5V, VIL = 0V VCC (V) 3.3 2.5 3.3 2.5 TA = 25°C Typical 0 .8 0 .6 - 0.8 - 0.6 Units V V
Capacitance
Symbol CIN COUT CPD Input Capacitance Output Capacitance Power Dissipation Capacitance Parameter Conditions VCC = Open, VI = 0V or VCC VCC = 3.3V, VI = 0V or VCC VCC = 3.3V, VI = 0V or VCC, f = 10 MHz Typical 7 8 25 Units pF pF pF
www.fairchildsemi.com
4
74LCX257
AC LOADING and WAVEFORMS Generic for LCX Family
FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance) Test tPLH, tPHL tPZL, tPLZ tPZH,tPHZ Switch Open 6V at VCC = 3.3 ± 0.3V VCC x 2 at VCC = 2.5 ± 0.2V GND
Waveform for Inverting and Non-Inverting Functions
3-STATE Output High Enable and Disable Times for Logic
Propagation Delay. Pulse Width and trec Waveforms
Setup Time, Hold Time and Recovery Time for Logic
3-STATE Output Low Enable and Disable Times for Logic FIGURE 2. Waveforms (Input Characteristics; f =1MHz, tR = tF = 3ns) Symbol Vmi Vmo Vx Vy VC C 3.3V ± 0.3V 1.5V 1.5V VOL + 0.3V VOH - 0.3V 1.5V 1.5V VOL + 0.3V VOH - 0.3V 2.7V
trise and tfall
2.5V ± 0.2V VCC/2 VCC/2 VOL + 0.15V VOH - 0.15V
5
www.fairchildsemi.com
Others parts begin by 74
74-1 74-2 74-3 74-4 74-5 74-6 74-7 74-8 74-9 74-10 74-11 74-12 74-13 74-14 74-15 74-16 74-17 74-18 74-19 74-20 74-21 74-22 74-23 74-24 74-25 74-26 74-27 74-28 74-29 74-30 74-31 74-32 74-33 74-34 74-35 74-36 74-37 74-38 74-39 74-40 74-41 74-42 74-43 74-44 74-45 74-46 74-47 74-48 74-49 74-50 74-51 74-52 74-53 74-54 74-55 74-56 74-57 74-58 74-59 74-60 74-61 74-62
|
|
|
