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Part: 74LVTH32245

Category:
 Communication
   -> Network
     -> Ethernet/DS1/E1 (T1/E1)
       -> Transceivers
             -> Transceiver/Repeater

Description: Low Voltage 32-Bit Transceiver With 3-STATE Outputs

Company: Fairchild Semiconductor

Datasheet: Download 74LVTH32245 datasheet     File size : 110 kB

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Datasheet text preview:
74LVT32245 · 74LVTH32245 Low Voltage 32-Bit Transceiver with 3-STATE Outputs

March 2002 Revised June 2002

74LVT32245 · 74LVTH32245 Low Voltage 32-Bit Transceiver with 3-STATE Outputs
General Description
The LVT32245 and LVTH32245 contain thirty-two noninverting bidirectional buffers with 3-STATE outputs and are intended for bus oriented applications. The devices are byte controlled. Each byte has separate control inputs which can be shorted together for full 32-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high impedance state. The LVTH32245 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs. These non-inverting transceivers are designed for low voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVT32245 and LVTH32245 are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining low power dissipation.

Features
s Input and output interface capability to systems at 5V VCC s Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs (74LVTH32245), also available without bushold feature (74LVT32245). s Live insertion/extraction permitted s Power Up/Down high impedance provides glitch-free bus loading s Outputs source/sink -32 mA/+64 mA s ESD performance: Human-body model > 2000V Machine model > 200V Charged-device model > 1000V s Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)

Ordering Code:
Order Number 74LVT32245G (Note 1)(Note 2) 74LVTH32245G (Note 1)(Note 2) Package Number BGA96A (Preliminary) BGA96A Package Description 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

Note 1: Ordering code "G" indicates Trays. Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.

Logic Symbol

© 2002 Fairchild Semiconductor Corporation

DS500433

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74LVT32245 · 74LVTH32245

Connection Diagram

Pin Descriptions
Pin Names OEn T/Rn A0­A31 B0­B31 Description Output Enable Input (Active LOW) Transmit/Receive Input Side A Inputs/3-STATE Outputs Side B Inputs/3-STATE Outputs

FBGA Pin Assignments
1 A B C D E F G (Top Thru View) H J K L M N P R T B1 B3 B5 B7 B9 B11 B1 3 B1 4 B1 7 B1 9 B2 1 B2 3 B2 5 B2 7 B2 9 B3 0 2 B0 B2 B4 B6 B8 B1 0 B1 2 B1 5 B1 6 B1 8 B2 0 B2 2 B2 4 B2 6 B2 8 B3 1 3 T/R1 G ND VCC1 G ND G ND VCC1 G ND T/R2 T/R3 G ND VCC2 G ND G ND VCC2 G ND T/R4 4 OE1 GND VC C 1 GND GND VC C 1 GND OE2 OE3 GND VC C 2 GND GND VC C 2 GND OE4 5 A0 A2 A4 A6 A8 A1 0 A1 2 A1 5 A1 6 A1 8 A2 0 A2 2 A2 4 A2 6 A2 8 A3 1 6 A1 A3 A5 A7 A9 A11 A1 3 A1 4 A1 7 A1 9 A2 1 A2 3 A2 5 A2 7 A2 9 A3 0

Truth Tables
Inputs OE1 L L H Inputs OE2 L L H T/R2 L H X Outputs Bus B8­B15 Data to Bus A8­A15 Bus A8­A15 Data to Bus B8­B15 HIGH­Z State on A8­A15,B8­B15 T/R1 L H X Outputs Bus B0­B7 Data to Bus A0­A7 Bus A0­A7 Data to Bus B0­B7 HIGH­Z State on A0­A7,B0­B7 Inputs OE3 L L H Inputs OE4 L L H T/R4 L H X Outputs Bus B24­B31 Data to Bus A24­A31 Bus B24­A31 Data to Bus B24­B31 HIGH­Z State on A24­A31,B24­B31 T/R3 L H X Outputs Bus B16­B23 Data to Bus A16­A23 Bus A16­A23 Data to Bus B16­B23 HIGH­Z State on A16­A23,B16­B23

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance

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2

74LVT32245 · 74LVTH32245

Functional Description
The LVT32245 and LVTH32245 contain thirty-two non-inverting bidirectional buffers with 3-STATE outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together to obtain 16-bit or full 32-bit operation.

Logic Diagrams
Byte 1 Byte 3

Byte 2

Byte 4

VCC1 is associated with Bytes 1 and 2. VCC2 is associated with Bytes 3 and 4.
Note: Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.

3

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74LVT32245 · 74LVTH32245

Absolute Maximum Ratings(Note 3)
Symbol VC C VI VO IIK IOK IO ICC IGND TSTG Parameter Supply Voltage DC Input Voltage Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current DC Supply Current per Supply Pin DC Ground Current per Ground Pin Storage Temperature Range Value Conditions Units V V Output in 3-STATE Output in HIGH or LOW State (Note 4) VI VCC Output at LOW State, VO > VCC V mA mA mA mA mA

-0.5 to +4.6 -0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 -5 0 -5 0
64 128

±6 4 ±128 -65 to +150

°C

Recommended Operating Conditions
Symbol VC C VI I OH I OL TA Supply Voltage Input Voltage HIGH-Level Output Current LOW-Level Output Current Free-Air Operating Temperature Input Edge Rate, VIN = 0.8V­2.0V, VCC = 3.0V Parameter Min 2.7 0 Max 3.6 5.5 Units V V mA mA

-32
64

-4 0
0

+85
10

°C
ns/V

t/V

Note 3: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied. Note 4: IO Absolute Maximum Ratings must be observed.

DC Electrical Characteristics
Symbol VIK VIH VIL VOH Parameter Input Clamp Diode Voltage Input HIGH Voltage Input LOW Voltage Output HIGH Voltage VCC (V) 2.7 2.7­3.6 2.7­3.6 2.7­3.6 2.7 3.0 VOL Output LOW Voltage 2.7 2.7 3.0 3.0 3.0 II(HOLD) (Note 5) II(OD) (Note 5) II Bushold Input Over-Drive Current to Change State Input Current Control Pins Data Pins IOFF IPU/PD IOZL IOZH Power Off Leakage Current Power Up/Down 3-STATE Output Current 3-STATE Output Leakage Current 3-STATE Output Leakage Current IOZL (Note 5) 3-STATE Output Leakage Current 3.6 3.6 3.6 0 0­1.5 3.6 3.6 3.6 3.0 Bushold Input Minimum Drive 3.0 75 -75 500 -500 10 ±1 -5 1 ±100 ±100 -5 -5 5 µA µA µA µA µA µA VCC - 0.2 2.4 2.0 0.2 0.5 0.4 0.5 0.55 µA µA V V 2.0 0.8 TA = -40°C to +85°C M in Max -1.2 Units V V V Conditions II = -18 mA VO 0.1V or VO VCC - 0.1V IOH = -100 µA IOH = -8 mA IOH = -32 mA IOL = 100 µA IOL = 24 mA IOL = 16 mA IOL = 32 mA IOL = 64 mA VI = 0.8V VI = 2.0V (Note 6) (Note 7) VI = 5.5V VI = 0V or VCC VI = 0V VI = VCC 0V VI or VO 5.5V VO = 0.5V to 3.0V VI = GND or VCC VO = 0.5V VO = 0.0V VO = 3.0V

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4

74LVT32245 · 74LVTH32245

DC Electrical Characteristics
Symbol Parameter

(Continued)
VCC (V) 3.6 3.6 3.6 3.6 3.6 3.6 3.6 TA = -40°C to +85°C Min Max 5 10 0 .19 5.0 0.19 0.19 0.2 µA µA mA mA mA mA mA VO = 3.6V VCC < VO 5.5V Outputs HIGH Outputs LOW Outputs Disabled VCC VO 5.5V, Outputs Disabled One Input at VCC - 0.6V Other Inputs at VCC or GND

Units

Conditions

IOZH (Note 5) 3-STATE Output Leakage Current IOZH+ ICCH ICCL ICCZ ICCZ+ ICC 3-STATE Output Leakage Current Power Supply Current Power Supply Current Power Supply Current Power Supply Current VCC1 or VCC2 VCC1 or VCC2 VCC1 or VCC2 VCC1 or VCC2

Increase in Power Supply Current (Note 8) VCC1 or VCC2

Note 5: Applies to bushold versions only (74LVTH32245). Note 6: An external driver must source at least the specified current to switch from LOW-to-HIGH. Note 7: An external driver must sink at least the specified current to switch from HIGH-to-LOW. Note 8: This is the increase in supply current for each input that is at the specified voltage level rather than VCC or GND.

Dynamic Switching Characteristics
Symbol VOLP VOLV Parameter Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL

(Note 9)
TA = 25°C M in Typ 0.8 -0.8 M ax V V Units Conditions CL = 50 pF, RL = 500 (Note 10) (Note 10)

VCC (V) 3.3 3.3

Note 9: Characterized in SSOP package. Guaranteed parameter, but not tested. Note 10: Max number of outputs defined as (n). n-1 data inputs are driven 0V to 3V. Output under test held LOW.

AC Electrical Characteristics
TA = -40°C to +85°C Symbol Parameter CL = 50 pF, RL = 500 VCC = 3.3V ± 0.3V Min tPLH tP H L tPZH tPZL tP H Z tPLZ Output Disable Time Output Enable Time Propagation Delay Data to Output 1.5 1.3 1.5 1.6 2.3 2.2 M ax 3 .5 3 .5 4 .5 5 .3 5 .4 5 .1 1.5 1.3 1.5 1.6 2.3 2.2 VCC = 2.7V M in M ax 3 .9 3 .9 5 .3 6 .9 6 .1 5 .4 ns ns ns Units

Capacitance
Symbol CIN CI/O

(Note 11)
Parameter Conditions VCC = 0V, VI = 0V or VCC VCC = 3.0V, VO = 0V or VCC Typical 4 8 Units pF pF

Input Capacitance Input/Output Capacitance

Note 11: Capacitance is measured at frequency f = 1 MHz, per MIL-STD-883, Method 3012.

5

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