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Part: 74LVTH32952GX
Category:
Description: 74LVTH32952 - Low Voltage 32-Bit Registered Transceiver With 3-STATE Outputs (Preliminary)
Company: Fairchild Semiconductor
Datasheet: Download 74LVTH32952GX datasheet File size : 110 kB
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Preliminary
74LVTH32952 Low Voltage 32-Bit Registered Transceiver with 3-STATE Outputs (Preliminary)
September 2000 Revised August 2001
74LVTH32952 Low Voltage 32-Bit Registered Transceiver with 3-STATE Outputs (Preliminary)
General Description
The LVTH32952 is a 32-bit registered transceiver. Four 8-bit back to back registers store data flowing in both directions between two bidirectional buses. Separate clock, clock enable, and output enable signals are provided for each register. The LVTH32952 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs. The registered transceiver is designed for low voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVTH32952 is fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining low power dissipation.
Features
s Input and output interface capability to systems at 5V VCC s Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs s Live insertion/extraction permitted s Power Up/Down high impedance provides glitch-free bus loading s Outputs source/sink -32 mA/+64 mA s ESD performance: Human-body model > 2000V Machine model > 200V Charged-device model > 1000V s Packaged in plastic Fine-Pitch Ball Grid Array (FBGA) (Preliminary)
Ordering Code:
Order Number 74LVTH32952GX (Note 1) Package Number BGA114A (Preliminary) Package Description 114-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide [TAPE and REEL]
Note 1: BGA package available in Tape and Reel only.
© 2001 Fairchild Semiconductor Corporation
DS500411
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Preliminary 74LVTH32952 Connection Diagram Pin Descriptions
Pin Names A0A31 B0B31 CPABn, CPBAn CEAn, CEBn OEABn, OEBAn Description Data Register A Inputs B-Register 3-STATE Outputs Data Register B Inputs A-Register 3-STATE Outputs Clock Pulse Inputs Clock Enable Output Enable Inputs
Pin Assignments for FBGA
1 A B C D E F G (Top Thru View) H J K L Inputs A X X L L H H X X X X CPABn CEAn OEABn X H H L L L L X X X X L H L H L H L L H H Internal Register Output Value NC NC L L H H NC NC NC NC B B0 Z L Z H Z B0 B0 Z Z M N P R T U V W A0 A2 A4 A6 A8 A1 0 A1 2 A1 3 A1 5 NC A1 6 A1 8 A2 0 A2 2 A2 4 A2 6 A2 8 A2 9 A3 1 2 CEA 1 A1 A3 A5 A7 A9 A11 A1 4 CEA 2 3 4 5 CEB 1 B1 B3 B5 B7 B9 B11 B1 4 CEB 2 6 B0 B2 B4 B6 B8 B1 0 B1 2 B1 3 B1 5 NC B1 6 B1 8 B2 0 B2 2 B2 4 B2 6 B2 8 B2 9 B3 1 CPAB1 CPBA1 OEAB1 OEBA1 GND VCC1 GND GND VCC1 GND GND VCC1 GND GND VCC1 GND
Truth Table
(Note 2)
CPAB2 CPBA2
CPAB3 OEAB2 OEBA2 CPBA3 CEA3 OEAB3 OEBA3 A1 7 A1 9 A2 1 A2 3 A2 5 A2 7 A3 0 GND VCC2 GND GND VCC2 GND GND VCC2 GND GND VCC2 GND CEB 3 B1 7 B1 9 B2 1 B2 3 B2 5 B2 7 B3 0 CEB 4
L H L H
X
CPAB4 CPBA4
CEA4 OEAB4 OEBA4
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = Output High Impedance = LOW-to-HIGH Transition. NC = No Change (state established by last valid CP) B0 = State established by last valid CP
Note 2: A to B data flow shown; B to A flow control is the same, but uses OEBAn, CPBAn and CEBn.
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Preliminary
74LVTH32952
Logic Diagram
Byte 1 of 4
n = 1 for Byte 1, n = 2 for Byte 2, etc. Byte 1: A0 - A7, B0 - B7 Byte 2: A8 - A15, B8 - B15 Byte 3: A16 - A23, B16 - B23 Byte 4: A24 - A31, B24 - B31 VCC1 is associated with Bytes 1 and 2 VCC2 is associated with Bytes 3 and 4 Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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Preliminary 74LVTH32952 Absolute Maximum Ratings(Note 3)
Symbol VCC VI VO IIK IOK IO ICC IGND TSTG Parameter Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current DC Supply Current per Supply Pin DC Ground Current per Ground Pin Storage Temperature Value Conditions Units V V Output in 3-STATE Output in HIGH or LOW State (Note 4) VI VCC VO > VCC Output at HIGH State Output at LOW State V V mA mA mA mA mA
-0.5 to +4.6 -0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 -5 0 -5 0
64 128
±6 4 ±128 -65 to +150
°C
Recommended Operating Conditions
Symbol VCC VI IOH IOL TA Supply Voltage Input Voltage HIGH Level Output Current LOW Level Output Current Free-Air Operating Temperature Input Edge Rate, VIN = 0.8V2.0V, VCC = 3.0V Parameter Min 2.7 0 Max 3.6 5.5 Units V V mA
-3 2
64
-4 0
0
+8 5
10
°C
ns/V
t/V
Note 3: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied. Note 4: IO Absolute Maximum Rating must be observed.
DC Electrical Characteristics
Symbol VIK VIH VIL VOH Parameter Input Clamp Diode Voltage Input HIGH Voltage Input LOW Voltage Output HIGH Voltage VCC (V) 2.7 2.73.6 2.73.6 2.73.6 2.7 3.0 VOL Output LOW Voltage 2.7 2.7 3.0 3.0 3.0 II(HOLD) II(OD) II Bushold Input Minimum Drive Bushold Input Over-Drive Current to Change State Input Current Control Pins Data Pins IOFF IPU/PD IOZL IOZH IOZH+ Power Off Leakage Current Power Up/Down 3-STATE Output Current 3-STATE Output Leakage Current 3-STATE Output Leakage Current 3-STATE Output Leakage Current 3.6 3.6 3.6 0 01.5V 3.6 3.6 3.6 3 .0 3.0 75 -75 500 -500 10 ±1 -5 1 ±100 ±100 -5 5 10 VCC - 0.2 2.4 2.0 0.2 0 .5 0 .4 0 .5 0 .55 2.0 0 .8 T A = -40°C to +85°C M in Max - 1.2 Units V V V V V V V V V V µA µA µA µA µA µA µA µA µA µA µA µA µA Conditions II = -18 mA VO 0.1V or VO VCC - 0.1V IOH = -100 µA IOH = -8 mA IOH = -32 mA IOL = 100 µA IOL = 24 mA IOL = 16 mA IOL = 32 mA IOL = 64 mA VI = 0.8V VI = 2.0V (Note 5) (Note 6) VI = 5.5V VI = 0V or VCC VI = 0V VI = VCC 0V VI or VO 5.5V VO = 0.5V to 3.0V VI = GND or VCC VO = 0.0V VO = 3.6V VCC < V O 5.5V
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Preliminary
74LVTH32952
DC Electrical Characteristics
Symbol ICCH ICCL ICCZ ICCZ+ ICC Parameter Power Supply Current Power Supply Current Power Supply Current Power Supply Current VCC1 or VCC2 VCC1 or VCC2 VCC1 or VCC2 VCC1 or VCC2
(Continued)
VCC (V) 3.6 3.6 3.6 3.6 T A = -40°C to +85°C M in Max 0.19 5 0.19 0.19 mA mA mA mA Outputs High Outputs Low Outputs Disabled VCC VO 5.5V, Outputs Disabled One Input at VCC - 0.6V Other Inputs at VCC or GND
Units
Conditions
Increase in Power Supply Current (Note 7) VCC1 or VCC2
3.6
0.2
mA
Note 5: An external driver must source at least the specified current to switch from LOW-to-HIGH. Note 6: An external driver must sink at least the specified current to switch from HIGH-to-LOW. Note 7: This is the increase in supply current for each input that is at the specified voltage level rather than VCC or GND.
Dynamic Switching Characteristics
Symbol VOLP VOLV Parameter Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL VCC (V) 3.3 3.3
(Note 8)
TA = 25°C Units V V Conditions CL = 50 pF, RL = 500 (Note 9) (Note 9)
M in
Typ 0 .8 - 0.8
Max
Note 8: Characterized in SSOP package. Guaranteed parameter, but not tested. Note 9: Max number of outputs defined as (n). n-1 data inputs are driven 0V to 3V. Output under test held LOW.
AC Electrical Characteristics
TA = -40°C to +85°C Symbol Parameter CL = 50 pF, RL = 500 VCC = 3.3 ± 0.3V Min fMAX tPLH tPHL tPZH tPZL tPHZ tPLZ tW tS Output Disable Time OE to A or B Pulse Width, CPAB or CPBA HIGH or LOW Setup Time A or B before CPAB or CPBA CEA or CEB before CPAB or CPBA tH Hold Time A or B after CPAB or CPBA CEA or CEB after CPAB or CPBA Maximum Clock Frequency Propagation Delay CPBA or CPAB to A or B Output Enable Time OE to A or B 150 1.3 1.3 1.0 1.0 2.1 2.1 3.3 1.7 2.0 0.8 0.4 4.4 4 .8 4 .3 4.8 5 .7 5.1 Max VCC = 2.7V Min 150 1.3 1 .3 1.0 1 .0 2.1 2 .1 3.3 2 .5 ns 2 .8 0 .0 ns 0 .0 4.7 5 .0 4 .9 5.7 6 .2 5.3 Max MHz ns ns ns ns Units
Capacitance (Note 10)
Symbol CIN CI/O Parameter Input Capacitance Input/Output Capacitance Conditions VCC = OPEN, VI = 0V or VCC VCC = 3.0V, VO = 0V or VCC Typical 4 8 Units pF pF
Note 10: Capacitance is measured at frequency f = 1 MHz, per MIL-STD-883, Method 3012.
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