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Part: CD4020BCCW
Category:
Logic
-> Counters
-> CMOS/BiCMOS->4000 Family
Description: 14-Stage Ripple Carry Binary Counters
Company: Fairchild Semiconductor
Datasheet: Download CD4020BCCW datasheet File size : 395 kB
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Datasheet text preview:
CD4020BC · CD4040BC · CD4060BC 14-Stage Ripple Carry Binary Counters · 12-Stage Ripple Carry Binary Counters · 14-Stage Ripple Carry Binary Counters
October 1987 Revised March 2002
CD4020BC · CD4040BC · CD4060BC 14-Stage Ripple Carry Binary Counters · 12-Stage Ripple Carry Binary Counters · 14-Stage Ripple Carry Binary Counters
General Description
The CD4020BC, CD4060BC are 14-stage ripple carry binary counters, and the CD4040BC is a 12-stage ripple carry binary counter. The counters are advanced one count on the negative transition of each clock pulse. The counters are reset to the zero state by a logical "1" at the reset input independent of clock.
Features
s Wide supply voltage range: 3.0V to 15V s High noise immunity: 0.45 VDD (typ.) s Low power TTL compatibility: or 1 driving 74LS s Schmitt trigger clock input Fan out of 2 driving 74L
s Medium speed operation: 8 MHz typ. at VDD = 10V
Ordering Code:
Order Number CD4020BCM CD4020BCN CD4040BCM CD4040BCSJ CD4040BCN CD4060BCM CD4060BCN Package Number M16A N16E M16A M16D N16E M16A N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagrams
Pin Assignments for DIP and SOIC CD4020BC Pin Assignments for DIP, SOIC and SOP CD4040BC
Top View
Top View
© 2002 Fairchild Semiconductor Corporation
DS005953
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CD4020BC · CD4040BC · CD4060BC
Connection Diagrams
(Continued) Pin Assignments for DIP and SOIC CD4060BC
Top View
Schematic Diagrams
CD4020BC
CD4040BC
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CD4020BC · CD4040BC · CD4060BC
Schematic Diagrams
(Continued) CD4060BC
CD4060B Typical Oscillator Connections
RC Oscillator
Crystal Oscillator
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CD4020BC · CD4040BC · CD4060BC
Absolute Maximum Ratings(Note 1)
(Note 2) Supply Voltage (VDD ) Input Voltage (VIN) Storage Temperature Range (TS) Package Dissipation (PD) Dual-In-Line Small Outline Lead Temperature (TL) (Soldering, 10 seconds) 260 °C 700 mW 500 mW
Recommended Operating Conditions
Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range (TA)
-0.5V to +18V -0.5V to VDD +0.5V -65°C to +150°C
+3V to +15V
0V to VDD
-55°C to +125°C
Note 1: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The tables of "Recommended Operating Conditions" and "Electrical Characteristics" provide conditions for actual device operation. Note 2: VSS = 0V unless otherwise specified.
DC Electrical Characteristics (Note 2)
Symbol IDD Parameter Quiescent Device Current Conditions VDD = 5V, VIN = VDD or VSS VDD = 10V, VIN = V DD or VSS VDD = 15V, VIN = V DD or VSS VOL LOW Level Output Voltage VDD = 5V VDD = 10V VDD = 15V VOH HIGH Level Output Voltage VDD = 5V VDD = 10V VDD = 15V VIL LOW Level Input Voltage VDD = 5V, VO = 0.5V or 4.5V VDD = 10V, VO = 1.0V or 9.0V VDD = 15V, VO = 1.5V or 13.5V VIH HIGH Level Input Voltage VDD = 5V, VO = 0.5V or 4.5V VDD = 10V, VO = 1.0V or 9.0V VDD = 15V, VO = 1.5V or 13.5V IOL LOW Level Output Current (Note 3) IOH HIGH Level Output Current (Note 3) IIN Input Current VDD = 5V, VO = 0.4V VDD = 10V, VO = 0.5V VDD = 15V, VO = 1.5V VDD = 5V, VO = 4.6V VDD = 10V, VO = 9.5V VDD = 15V, VO = 13.5V VDD = 15V, VIN = 0V VDD = 15V, VIN = 15V 3.5 7.0 11.0 0.64 1.6 4.2 -0.64 - 1.6 - 4.2 -0.1 0.1 4.95 9.95 14.95 1.5 3.0 4.0 3.5 7.0 11.0 0.51 1.3 3 .4 -0.51 -1.3 -3.4 -55°C Min Max 5 10 20 0.05 0.05 0.05 4.95 9.95 14.95 0 0 0 5 10 15 2 4 6 3 6 9 0.88 2.25 8.8 -0.88 -2.25 - 8.8 -10-5 10-5 -0.1 0.1 1.5 3.0 4.0 3.5 7.0 11.0 0.36 0.9 2 .4 -0.36 -0.9 -2.4 - 1.0 1.0 µA mA mA V Min +25°C Typ Max 5 10 20 0.05 0.05 0.05 4.95 9.95 14.95 1.5 3.0 4.0 V V +125°C M in Max 150 300 600 0 .05 0.05 0.05 V µA Units
Note 3: Data does not apply to oscillator points 0 and 0 of CD4060BC. I OH and IOL are tested one output at a time.
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CD4020BC · CD4040BC · CD4060BC
AC Electrical Characteristics
Symbol tPHL1, tPLH1 Parameter Propagation Delay Time to Q1
(Note 4)
Conditions Min Typ 250 100 75 150 60 45 100 50 40 125 50 40 Max 550 210 150 330 125 90 200 100 80 335 125 100 No Limit No Limit No Limit 1.5 4 5 4 10 12 200 100 80 200 100 80 5 50 450 210 170 450 210 170 7.5 pF pF ns ns MHz ns ns ns ns ns Units
CD4020BC, CD4040BC TA = 25°C, CL = 50 pF, RL = 200k, tr = tf = 20 ns, unless otherwise noted VDD = 5V VDD = 10V VDD = 15V tPHL, tPLH Interstage Propagation Delay Time from Qn to Qn+1 tTHL, tTLH Transition Time VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V tWL, tWH Minimum Clock Pulse Width VDD = 5V VDD = 10V VDD = 15V trCL, tfCL Maximum Clock Rise and Fall Time VDD = 5V VDD = 10V VDD = 15V fCL Maximum Clock Frequency VDD = 5V VDD = 10V VDD = 15V tPHL(R) Reset Propagation Delay VDD = 5V VDD = 10V VDD = 15V tWH(R) Minimum Reset Pulse Width VDD = 5V VDD = 10V VDD = 15V CIN CPD Average Input Capacitance Power Dissipation Capacitance Any Input
Note 4: AC Parameters are guaranteed by DC correlated testing.
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