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Part: CD4029BCSJX
Category:
Description: Presettable Binary/decade Up/down Counter
Company: Fairchild Semiconductor
Datasheet: Download CD4029BCSJX datasheet File size : 297 kB
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Datasheet text preview:
CD4029BC Presettable Binary/Decade Up/Down Counter
October 1987 Revised April 2002
CD4029BC Presettable Binary/Decade Up/Down Counter
General Description
The CD4029BC is a presettable up/down counter which counts in either binary or decade mode depending on the voltage level applied at binary/decade input. When binary/ decade is at logical "1", the counter counts in binary, otherwise it counts in decade. Similarly, the counter counts up when the up/down input is at logical "1" and vice versa. A logical "1" preset enable signal allows information at the "jam" inputs to preset the counter to any state asynchronously with the clock. The counter is advanced one count at the positive-going edge of the clock if the carry in and preset enable inputs are at logical "0". Advancement is inhibited when either or both of these two inputs is at logical "1". The carry out signal is normally at logical "1" state and goes to logical "0" state when the counter reaches its maximum count in the "up" mode or the minimum count in the "down" mode provided the carry input is at logical "0" state. All inputs are protected against static discharge by diode clamps to both VDD and VSS.
Features
s Wide supply voltage range: 3V to 15V s High noise immunity: 0.45 VDD (typ.) s Low power TTL compatibility: fan out of 2 driving 74L or 1 driving 74LS s Parallel jam inputs s Binary or BCD decade up/down counting
Ordering Code:
Order Number CD4029BCWM CD4029BCSJ CD4029BCN Package Number M16B M16D N16E Package Description 16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Top View
© 2002 Fairchild Semiconductor Corporation
DS005960
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CD4029BC
Logic Diagram
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CD4029BC
Absolute Maximum Ratings(Note 1)
(Note 2) DC Supply Voltage (VDD) Input Voltage (VIN) Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line Small Outline Lead Temperature (TL) (Soldering, 10 seconds) 260°C (Note 2) 700 mW 500 mW
Recommended Operating Conditions (Note 2)
DC Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range (TA) 3V to 15 VDC 0V to VDD VDC
-0.5V to +18 VDC -0.5V to VDD + 0.5 VDC -65°C to +150°C
-55°C to +125°C
Note 1: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. Except for "Operating Temperature Range" they are not meant to imply that the devices should be operated at these limits. The table of "Electrical Characteristics" provides conditions for actual device operation. Note 2: VSS = 0V unless otherwise specified.
DC Electrical Characteristics
Symbol IDD Parameter Quiescent Device Current VDD = 5V VDD = 10V VDD = 15V VOL LOW Level Output Voltage |IO| < 1 µA VDD = 5V VDD = 10V VDD = 15V VOH HIGH Level Output Voltage |IO| < 1 µA VDD = 5V VDD = 10V VDD = 15V VIL LOW Level Input Voltage VIH HIGH Level Input Voltage IOL LOW Level Output Current (Note 3) IOH HIGH Level Output Current (Note 3) IIN Input Current
Conditions
-55°C Min Max 5 10 20 0.05 0.05 0.05 4.95 9.95 14.95 1.5 3.0 4.0 3 .5 7.0 11.0 0.64 1.6 4.2 -0.64 - 1.6 - 4.2 -0.1 0 .1 3.5 7.0 11.0 0.51 1.3 3.4 -0.51 -1.3 -3.4 4.95 9.95 14.95 Min
+25°C Typ Max 5 10 20 0 0 0 5 10 15 1 .5 3.0 4.0 0.05 0.05 0.05
+125°C M in Max 150 300 600 0.05 0.05 0.05 4.95 9.95 14.95 1.5 3.0 4.0 3.5 7.0 11.0
Units
µA
V
V
VDD = 5V, VO = 0.5V or 4.5V VDD = 10V, VO = 1V or 9V VDD = 15V, VO = 1.5V or 13.5V VDD = 5V, VO = 0.5V or 4.5V VDD = 10V, VO = 1V or 9V VDD = 15V, VO = 1.5V or 13.5V VDD = 5V, VO = 0.4V VDD = 10V, VO = 0.5V VDD = 15V, VO = 1.5V VDD = 5V, VO = 4.6V VDD = 10V, VO = 9.5V VDD = 15V, VO = 13.5V VDD = 15V, VIN = 0V VDD = 15V, VIN = 15V
V
V
0.88 2.25 8.8 -0.88 -2.25 - 8.8 -10-5 1 0 -5 -0.1 0.1
0.36 0.9 2.4 -0.36 -0.9 -2.4 -1.0 1.0 µA mA mA
Note 3: IOH and IOL are tested one output at a time.
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CD4029BC
AC Electrical Characteristics
Symbol CLOCKED OPERATION tPHL or tPLH Propagation Delay Time to Q Outputs tPHL or tPLH Propagation Delay Time to Carry Output tPHL or tPLH Propagation Delay Time to Carry Output Parameter
(Note 4)
Conditions VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V CL = 15 pF VDD = 5V VDD = 10V VDD = 15V 285 120 95 100 50 40 160 70 55 15 10 5 180 70 55 1.5 3.7 4.5 3.1 7.4 9 5 65 285 115 95 400 165 135 80 30 25 150 60 50 265 110 90 200 85 70 570 230 195 800 330 260 160 60 50 300 120 100 530 220 180 400 170 140 ns ns ns ns ns ns 7.5 pF pF MHz 360 140 110 ns µs 570 240 190 200 100 80 320 135 110 ns ns ns M in Typ 200 85 70 320 135 110 Max 400 170 140 640 270 220 ns ns Units
TA = 25°C, CL = 50 pF, RL = 200k, Input trCL = tfCL = 20 ns, unless otherwise specified
tTHL or tTLH
Transition Time/Q or Carry Output
VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V
tWH or tWL
Minimum Clock Pulse Width
trCL or tfCL
Maximum Clock Rise and Fall Time
tSU
Minimum Set-Up Time
fCL
Maximum Clock Frequency
VDD = 5V VDD = 10V VDD = 15V
CIN CPD tPHL or tPLH
Average Input Capacitance Power Dissipation Capacitance Propagation Delay Time to Q output
Any Input Per Package (Note 5) VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V
PRESET ENABLE OPERATION
tPHL or tPLH
Propagation Delay Time to Carry Output
tWH
Minimum Preset Enable Pulse Width
tREM
Minimum Preset Enable Removal Time
CARRY INPUT OPERATION tPHL or tPLH Propagation Delay Time to Carry Output tPHL, tPLH Propagation Delay Time to Carry Output VDD = 5V VDD = 10V VDD = 15V CL = 15 pF VDD = 5V VDD = 10V VDD = 15V
Note 4: *AC Parameters are guaranteed by DC correlated testing. Note 5: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see 74C Family Characteristics application note, AN-90.
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CD4029BC
Logic Waveforms
Decade Mode
Binary Mode
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