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Details, datasheet, quote on part number:FDP14N60
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Datasheet text preview:
FDP14N60
May 2003
FDP14N60
14A, 600V, 0.490 Ohm, N-Channel SMPS Power MOSFET
Applications
Switch Mode Power Supplies(SMPS), such as
Features
· Low Gate Charge Requirem ent Qg results in Simple Drive
· PFC Boost · Two Switch Forward Converter · Single Switch Forward Converter · Flyback Converter · Buck Converter · High Speed Switching
· Improved Gate, Avalanche and High Reapplied dv/dt Ruggednes s · Reduced rDS(ON) · Reduced Miller Capacitance and Low Input Capacitance · Improved Switching Speed with Low EMI · 175°C Rated Junction Temperature
Package
JEDEC TO-220
Symbol
D
G S Drain (FLANGE) G D S
Absolute Maximum Ratings TJ = 25oC unless otherwise noted
Symbol VDSS VGS Par a m e t e r Drain to Source Voltage Gate to Source Voltage Drain Current ID Continuous (TC = 25oC, VGS = 10V) Continuous (TC = 100 C, VGS = 10V) P ulsed PD EAS IAR TJ, TSTG Power dissipation Derate above 25oC Single Pulse Avalanche Energy2 Avalanche Current Operating and Storage Temperature Soldering Temperature for 10 seconds
o
R ati n gs 600 ± 30 14 10 Figure 10 300 2 550 14 -55 to 175 300 (1.6mm from case)
Units V V A A A W W/oC mJ A
oC oC
Thermal Characteristics
R J C R C S R J A Thermal Resistance Junction to Case Thermal Resistance Case to Sink, Flat, Greased Surface Thermal Resistance Junction to Ambient 0.50 0.24 TYP 62
o o
C/W C/W
oC/W
©2003 Fairchild Semiconductor Corporation
FD P14N 60 Rev. A
FDP14N60
Package Marking and Ordering Information
Device Marking FDP14N60 Devi ce F D P14N60 Package TO-220 Reel Size N/ A Tape Width N/ A Quantity 50
Electrical Characteristics TJ = 25°C (unless otherwise noted)
Symbol P a r a m e te r Test Conditions Mi n Typ M ax Units
Statics
BVDSS Drain to Source Breakdown Voltage ID = 250µA, VGS = 0V Reference to 25oC, ID = 1mA 600 2. 0 0. 6 0. 457 3. 6 0.490 4.0 25 25 0 ±100 V V/°C V µA nA BVDSS/TJ Breakdown Voltage Temp. Coefficient rDS(ON) VGS(th) IDSS IGSS Drain to Source On-Resistance Gate Threshold Voltage Zero Gate Voltage Drain Current Gate to Source Leakage Current
VGS = 10V, ID = 7.0A VDS = VGS, ID = 250µA VDS = 600V VGS = 0V VGS = ±30V TC = 25oC
TC = 150oC
Dynami cs
gfs Qg(TOT) Qgs Qgd td(ON) tr td(OFF) tf CISS COSS CRSS Forward Transconductance Total Gate Charge Gate to Source Gate Charge Gate to Drain "Miller" Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 50V, ID = 7.0A VGS = 10V, VDS = 480V, ID = 14A VDD = 300V, ID = 14A, RG = 6.2, RD = 21.4 VDS = 25V, VGS = 0V, f = 1MHz 8 36 9. 3 12.6 14.2 15.2 37.2 15.7 19 00 200 15 47 12 16 S nC nC nC ns ns ns ns pF pF pF
Avalanche Characteristics
E AS IAR Single Pulse Avalanche Energy2 Avalanche Current 550 14 mJ A
Drain-Source Diode Characteristics
IS ISM VSD trr QRR
Notes:
1: Repetitive rating; pulse width limited by maximum junction temperature. 2: Starting TJ = 25°C, L = 5.64mH, IAS = 14A
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)
1
MOSFET symbol showing the integral reverse p-n junction diode. ISD = 14A
D
-
0. 87 580 6.4
14 56 1.2 775 8.6
A A V ns µC
G S
Source to Drain Diode Voltage Reverse Recovery Time Reverse Recovered Charge
ISD = 14A, dISD/dt = 100A/µs ISD = 14A, dISD/dt = 100A/µs
©2003 Fairchild Semiconductor Corporation
FDP14N60 Rev. A
FDP14N60
Typical Characteristics
100
ID, DRAIN TO SOURCE CURRENT (A)
10
1
15V 12V 10V 9V 8V 7V 6V 5.5V 5V 4.5V
ID, DRAIN TO SOURCE CURRENT (A)
TJ = 25oC VGS DESCENDING
100
TJ = 175oC VGS DESCENDING 15V 12V 10V 9V 8V 7V 6V 5.5V 5V 4.5V 4V
10
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
1
VGS = 4V PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
VGS = 4.5V 0.1 0.1 1 10 100
0.1 0.1
1
10
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. Output Characteristics
35 PULSE DURATION = 80µs 30 DUTY CYCLE = 0.5% MAX VDD = 100V 25 20 TJ = 175oC 15 10 TJ = 25oC 5 0 3.5 3.5
Figure 2. Output Characteristics
PULSE DURATION = 80µs
NORMALIZED ON RESISTANCE
3.0 DUTY CYCLE = 0.5% MAX 2.5 2.0 1.5 1.0 VGS = 10V, ID = 7.0A 0.5 0 -50
ID , DRAIN CURRENT (A)
4.0
4.5
5.0
5.5
6.0
6.5
-25
0
25
50
75
100
125
o
150
175
VGS , GATE TO SOURCE VOLTAGE (V)
TJ, JUNCTION TEMPERATURE ( C)
Figure 3. Transfer Characteristics
Figure 4. Normalized Drain To Source On Resistance vs Junction Temperature
15
5000 CISS
VGS , GATE TO SOURCE VOLTAGE (V)
VGS = 0V, f = 1MHz
ID = 14A 12
C, CAPACITANCE (pF)
1000
COSS
9
100
6 480V 300V 120V 0 0 10 20 30 40 50 60
CRSS 10 1 10 100
3
VDS , DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 5. Capacitance vs Drain To Source Voltage
Figure 6. Gate Charge Waveforms For Constant Gate Current
©2003 Fairchild Semiconductor Corporation
FDP14N60 Rev. A
FDP14N60
Typical Characteristics
ISD , SOURCE TO DRAIN CURRENT (A)
35 30
100 TC = 25oC
ID, DRAIN CURRENT (A)
25 20 TJ = 175oC 15 10 TJ = 25 C 5 0 0.3
o
100µs 10 1ms 10ms DC 1.0
OPERATION IN THIS AREA LIMITED BY RDS(ON) 0.1
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1
10
100
1000
VSD , SOURCE TO DRAIN VOLTAGE (V)
VDS , DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Body Diode Forward Voltage vs Body Diode Current
16
Figure 8. Maximum Safe Operating Area
200
IDM, PEAK CURRENT (A)
ID, DRAIN CURRENT (A)
12
TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION
100
TC = 25oC FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: I = I25 VGS = 10V 175 - TC 150
9
6
3
0 25 50 75 100 125 150 175
10 10-5
10-4
10-3
10-2
10-1
100
101
TC, CASE TEMPERATURE (oC)
t, PULSE WIDTH (s)
Figure 9. Maximum Drain Current vs Case Temperature
ZJC , NORMALIZED THERMAL RESPONSE
2 1 Duty Cycle - Descending Order 0.50 0.20 0.10 0.05 0.02 0.01
Figure 10. Peak Current Capability
0.1 PD
t1
t2 DUTY FACTOR, D = t1 / t2 PEAK TJ = (PD X Z JC X R JC) + TC SINGLE PULSE 0.01 10-5 10-4 10-3 10-2 10-1 100 101
t1 , RECTANGULAR PULSE DURATION (s)
Figure 11. Normalized Transient Thermal Impedance, Junction to Case
©2003 Fairchild Semiconductor Corporation
FDP14N60 Rev. A
FDP14N60
Test Circuits and Waveforms
VDS tP L IAS VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG
+
BVDSS VDS VDD
VDD -
0V
IAS 0.01
0 tAV
Figure 12. Unclamped Energy Test Circuit
Figure 13. Unclamped Energy Waveforms
VDS RL
VDD
Qg(TOT)
VDS VGS
+
VGS = 10V
DUT Ig(REF)
VDD
VGS VGS = 1V 0 Qg(TH) Qg s Ig(REF) 0 Qgd
Figure 14. Gate Charge Test Circuit
Figure 15. Gate Charge Waveforms
VDS
tON td(ON) RL VDS 90% tr
tOFF td(OFF) tf 90%
VGS
+
VDD DUT 0
10%
10%
90% VGS 0 10% 50% PULSE WIDTH 50%
RGS
VGS
Figure 16. Switching Time Test Circuit
Figure 17. Switching Time Waveform
©2003 Fairchild Semiconductor Corporation
FDP14N60 Rev. A
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