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Details, datasheet, quote on part number:FDP20N40
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Datasheet text preview:
FDH20N40 / FDP20N40
October 2002
FDH20N40 / FDP20N40
20A, 400V, 0.216 Ohm, N-Channel SMPS Power MOSFET
Applications
Switch Mode Power Supplies(SMPS), such as · PFC Boost · Two-Switch Forward Converter · Single Switch Forward Converter · Flyback Converter · Buck Converter · High Speed Switching
Features
· Low Gate Charge Requirem ent Qg results in Simple Drive
· Improved Gate, Avalanche and High Reapplied dv/dt Ruggednes s · Reduced rDS(ON) · Reduced Miller Capacitance and Low Input Capacitance · Improved Switching Speed with Low EMI · 175°C Rated Junction Temperature
Package
JEDEC TO-247
SOURCE DRAIN GATE
Symbol
JEDEC TO-220AB
D
SOURCE DRAIN GATE G
DRAIN (FLANGE)
DRAI N (FLANGE)
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol VDSS VGS ID Par a m e t e r Drain to Source Voltage Gate to Source Voltage Drain Current Continuous (TC = 25oC, VGS = 10V) Continuous (TC = Pulsed (Note 1) PD TJ, TSTG Power dissipation Derate above 25oC Operating and Storage Temperature Soldering Temperature for 10 seconds Mounting Torque, 8-32 or M3 Screw 100oC, VGS = 10V) 20 14 80 273 1. 82 -55 to 175 300 (1.6mm from case) 10ibf*in (1.1N*m) A A A W W/oC
o o
R ati n gs 400 ±30
Units V V
C C
Thermal Characteristics
R J C R C S R J A R J A Thermal Resistance Junction to Case Thermal Resistance Case to Sink, Flat, Greased Surface Thermal Resistance Junction to Ambient (TO-247) Thermal Resistance Junction to Ambient (TO-220) 0.55 0.24 40 62
o
C/W C/W C/W
oC/W o o
©2002 Fairchild Semiconductor Corporation
FDH20N40 / FDP20N40 Rev. A,
FDH20N40 / FDP20N40
Package Marking and Ordering Information
Device Marking F DH20N40 FDP20N40 Device F DH20N40 F DP20N40 Package TO-247 TO-220 Reel Size Tube Tube Tape Width Quantity 30 50
Electrical Characteristics TC = 25°C (unless otherwise noted)
Symbol P a r a m e te r Test Conditions Mi n Typ M ax Units
Statics
BVDSS Drain to Source Breakdown Voltage ID = 250µA, VGS = 0V V/°C Reference to 25°C ID = 1mA VGS = 10V, ID = 10A VDS = VGS, ID = 250µA VDS = 400V VGS = 0V VGS = ±20V TC = 25oC TC =150oC 400 2.0 0.43 0. 200 3. 5 0. 216 4. 0 25 250 ±100 V µA nA V BVDSS/TJ Breakdown Voltage Temp. Coefficient rDS(ON) VGS(th) IDSS IGSS Drain to Source On-Resistance Gate Threshold Voltage Zero Gate Voltage Drain Current Gate to Source Leakage Current
Dynami cs
gfs Qg(TOT) Qgs Qgd td(ON) tr td(OFF) tf CISS COSS CRSS Forward Transconductance Total Gate Charge at 10V Gate to Source Gate Charge Gate to Drain "Miller" Charge Tur n-On Delay Time Rise Time Tur n-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 50V, ID = 10A VGS = 10V VDS = 320V ID = 20A VDD = 200V ID = 20A RG = 10 RD = 15.4 VDS = 25V, VGS = 0V f = 1MHz 10 35 10 12 12.4 32.5 30 34 18 40 245 18 42 12 14. 4 S nC nC nC ns ns ns ns pF pF pF
Avalanche Characteristics
EAS IAR Single Pulse Avalanche Energy (Note 2) Avalanche Current 1100 20 mJ A
Drain-Source Diode Characteristics
IS ISM VSD trr QRR
Notes:
1: Repetitive rating; pulse width limited by maximum junction temperature 2: Starting TJ = 25°C, L = 5.5mH, IAS = 20A
Continuous Source Current (Body Diode) Pulsed Source Current (Note 1) (Body Diode) Source to Drain Diode Voltage Reverse Recovery Time Reverse Recovered Charge
MOSFET symbol showing the integral reverse p-n junction diode. ISD = 20A
D
-
0.9 351 4.5
20 80 1.2 456 5. 85
A A V ns µC
G S
ISD = 20A, dISD/dt = 100A/µs ISD = 20A, dISD/dt = 100A/µs
©2002 Fairchild Semiconductor Corporation
FDH20N40 / FDP20N40 Rev. A
FDH20N40 / FDP20N40
Typical Characteristics
100 100
ID, DRAIN TO SOURCE CURRENT (A)
ID, DRAIN TO SOURCE CURRENT (A)
TC = 25oC VGS DESCENDING 10V 7V 6.5V 6V 5.5V 10 5V
TC = 175oC VGS DESCENDING 10V 7V 6.5V 6V 5.5V 10 5V
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 1 1 10 100
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 1 1 10 100
VDS, DRAIN TO SOURCE VOLTAGE (V)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. Output Characteristics
40 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDD = 50V 30 NORMALIZED DRAIN TO SOURCE ON RESISTANCE
3.0
Figure 2. Output Characteristics
2.5
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
ID , DRAIN CURRENT (A)
2.0
20 TJ = 175oC 10 TJ = 25oC
1.5
1.0
0.5 VGS = 10V, ID = 10A 0.0 -50
0 2.5
3 .0
3.5
4.0
4.5
5 .0
5.5
6.0
6.5
-25
0
25
50
75
100
125
o
150
175
VGS , GATE TO SOURCE VOLTAGE (V)
TJ, JUNCTION TEMPERATURE ( C)
Figure 3. Transfer Characteristics
Figure 4. Normalized Drain To Source On Resistance vs Junction Temperatrue
15
VGS , GATE TO SOURCE VOLTAGE (V)
1000
CISS
ID = 20A
C, CAPACITANCE (pF)
200V 10 80V 320V
100
COSS
5
10 CRSS VGS = 0V, f = 1MHz 1 1 10 100
0 0
10
20
30
40
50
60
VDS , DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 5. Capacitance vs Drain To Source Voltage
Figure 6. Gate Charge Waveforms For Constant Gate Current
©2002 Fairchild Semiconductor Corporation
FDH20N40 / FDP20N40 Rev. A
FDH20N40 / FDP20N40
Typical Characteristics
ISD , SOURCE TO DRAIN CURRENT (A)
40 35 100
ID, DRAIN CURRENT (A)
30 25 20 15 10 5 0 0.2 TJ = 175oC TJ = 25oC
100µs 10 OPERATION IN THIS AREA LIMITED BY RDS(ON) 1 1ms 10ms DC
TC = 25oC 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0.1 1 10 100 1000
VSD , SOURCE TO DRAIN VOLTAGE (V)
VDS , DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Source to Drain Diode Forward Voltage
20
Figure 8. Maximum Safe Operating Area
ID, DRAIN CURRENT (A)
15
10
5
0 25
50
75
100
125
150
175
TC, CASE TEMPERATURE (°C)
Figure 9. Maximum Drain Current vs Case Temperature
Z JC , NORMALIZED THERMAL IMPEDANCE
2.0 1.0
0.50
0.20 0.1 0.10 PD 0.05 0.02 0.01 0.01 10-5 SINGLE PULSE 10-4 10-3 10-2 t2 DUTY FACTOR, D = t1 / t2 PEAK TJ = (PD X ZJC X RJC) + TC 10-1 100 t1
t1 , RECTANGULAR PULSE DURATION (s)
Figure 10. Normalized Maximum Transient Thermal Impedance
©2002 Fairchild Semiconductor Corporation
FDH20N40 / FDP20N40 Rev. A
FDH20N40 / FDP20N40
Test Circuits and Waveforms
VDS tP L IAS VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG
+
BVDSS VDS VDD
VDD -
0V
IAS 0.01
0 tAV
Figure 11. Unclamped Energy Test Circuit
Figure 12. Unclamped Energy Waveforms
VDS RL
Qg(TOT) VDS
VGS = 10V
VGS
+
DUT Ig(REF)
VDD
VGS VGS = 1V 0 Qg(TH) Qg s Ig(REF) 0 Qgd
Figure 13. Gate Charge Test Circuit
Figure 14. Gate Charge Waveforms
VDS
tON td(ON) RL VDS 90% tr
tOFF td(OFF) tf 90%
VGS
+
VDD DUT 0
10%
10%
90% VGS 0 10% 50% PULSE WIDTH 50%
RGS
VGS
Figure 15. Switching Time Test Circuit
Figure 16. Switching Time Waveform
©2002 Fairchild Semiconductor Corporation
FDH20N40 / FDP20N40 Rev. A
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