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Details, datasheet, quote on part number:FQA160N08
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Datasheet text preview:
FQA160N08
September 2000
FQA160N08
80V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for low voltage applications such as automotive, high efficiency switching for DC/DC converters, and DC motor control.
QFET
Features
· · · · · · · 160A, 80V, RDS(on) = 0.007 @VGS = 10 V Low gate charge ( typical 220 nC) Low Crss ( typical 530 pF) Fast switching 100% avalanche tested Improved dv/dt capability 175°C maximum junction temperature rating
TM
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G! G DS
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TO-3P
FQA Series
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Absolute Maximum Ratings
Symbol VDSS ID ID M VG S S EAS IA R EAR dv/dt PD T J, T S T G TL
TC = 25°C unless otherwise noted
Param eter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C) Drain Current - Pulsed
(Note 1)
FQA160N08 80 16 0 113 64 0 ± 25
(Note 2) (Note 1) (Note 1) (Note 3)
Un its V A A A V mJ A mJ V /ns W W/°C °C °C
Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C)
16 00 16 0 37.5 6.5 37 5 2.5 -55 to +175 30 0
- Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds
Thermal Characteristics
Symbol RJC RCS RJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Case-to-Sink Thermal Resistance, Junction-to-Ambient Typ -0.24 -Max 0.4 -40 Units °C/W °C/W °C/W
©2000 Fairchild Semiconductor International
Rev. A, September 2000
FQA160N08
Electrical Characteristics
Symbol Parameter
TC = 25°C unless otherwise noted
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS BVDSS / TJ ID S S IG S S F IG S S R Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25°C VDS = 80 V, VGS = 0 V VDS = 64 V, TC = 150°C VGS = 25 V, VDS = 0 V VGS = -25 V, VDS = 0 V 80 ------0 . 08 ------1 10 10 0 -100 V V/°C µA µA nA nA
On Characteristics
VGS(th) RDS(on) gF S Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance VDS = VGS, ID = 250 µA VGS = 10 V, ID = 80 A VDS = 30 V, ID = 80 A
(Note 4)
2.0 ---
-0. 0056 92
4. 0 0.007 --
V S
Dynamic Characteristics
Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz ---6100 2400 530 79 00 31 00 69 0 pF pF pF
Switching Characteristics
td ( o n ) tr td(off) tf Qg Qg s Qg d Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 64 V, ID = 160 A, VGS = 10 V
(Note 4, 5)
VDD = 40 V, ID = 160 A, RG = 25
(Note 4, 5)
--------
85 970 260 410 225 43 120
18 0 20 00 53 0 83 0 29 0 ---
ns ns ns ns nC nC nC
Drain-Source Diode Characteristics and Maximum Ratings
IS IS M VSD trr Qr r Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 160 A Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = 160 A, dIF / dt = 100 A/µs
(Note 4) (Note 6)
------
---125 510
160 64 0 1. 5 ---
A A V ns nC
Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 0.086mH, IAS = 160A, VDD = 25V, RG = 25 , Starting TJ = 25°C 3. ISD 160A, di/dt 300A/µs, VDD BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature 6. Continuous Drain Current Calculated by Maximum Junction Temperature : Limited by Package
©2000 Fairchild Semiconductor International
Rev. A, September 2000
FQA160N08
Typical Characteristics
ID, Drain Current [A]
10
2
ID, Drain Current [A]
VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V Top :
10
2
10
1
175
Notes : 1. 250 Pulse Test s 2. TC = 25
25
10
0
-55
10
1
Notes : 1. VDS = 30V 2. 250 Pulse Test s
10
-1
10
0
10
1
10
-1
2
4
6
8
10
VDS, Drain-Source Voltage [V]
VGS, Gate-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
20
RDS(ON) [m ], Drain-Source On-Resistance
VGS = 10V
VGS = 20V 10
IDR, Reverse Drain Current [A]
15
10
2
10
1
5
Note : TJ = 25
10
0
175
10
-1
25
Notes : 1. VGS = 0V 2. 250 Pulse Test s
0
0
200
400
600
800
1000
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
ID , Drain Current [A]
VSD, Source-Drain voltage [V]
Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature
20000 18000 16000 14000
Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd
12
10
VDS = 40V VDS = 64V
VGS , Gate-Source Voltage [V]
8
Capacitance [pF]
12000 10000 8000 6000 4000 2000 0 -1 10
0 1
Ciss Coss
Notes : 1. VGS = 0 V 2. f = 1 MHz
6
4
Crss
2
Note : ID = 160A
0
10
10
0
40
80
120
160
200
240
VDS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
©2000 Fairchild Semiconductor International
Rev. A, September 2000
FQA160N08
Typical Characteristics
(Continued)
1.2
3.0
2.5
BV DSS , (Normalized) Drain-Source Breakdown Voltage
RDS(ON) , (Normalized) Drain-Source On-Resistance
1.1
2.0
1.0
1.5
1.0
0.9
Notes : 1. VGS = 0 V 2. ID = 250 A
0.5
Notes : 1. VGS = 10 V 2. ID = 80 A
0.8 -100
-50
0
50
100
o
150
200
0.0 -100
-50
0
50
100
o
150
200
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation vs. Temperature
Figure 8. On-Resistance Variation vs. Temperature
180
Operation in This Area is Limited by R DS(on)
10
3
150
ID, Drain Current [A]
100 µs
10
2
10 µs
1 ms DC 10 ms
ID, Drain Current [A]
120
90
10
1
60
Limited by Package
10
0
Notes : 1. TC = 25 C 2. TJ = 175 C 3. Single Pulse
o o
30
10
-1
10
0
10
1
10
2
0 25
50
75
100
125
150
175
VDS, Drain-Source Voltage [V]
TC, Case Temperature []
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current vs. Case Temperature
(t), T h e rm a l R e s p o n s e
D = 0 .5
10
-1
0 .2 0 .1 0 .0 5 0 .0 2
N o te s : 1 . Z J C( t ) = 0 . 4 / W M a x . 2 . D u ty F a c to r , D = t1/t2 3 . T J M - T C = P D M * Z J C( t )
PD M t1
s in g le p u ls e
JC
10
-2
0 .0 1
t2
Z
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
Figure 11. Transient Thermal Response Curve
©2000 Fairchild Semiconductor International
Rev. A, September 2000
FQA160N08
Gate Charge Test Circuit & Waveform
50K 12V 200nF 300nF
Same Type as DUT VDS
VGS 10V Qg s Qg
VGS
Qg d
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS RG VGS
RL VDD
VDS
90%
10V
DUT
VGS
10%
td(on) t on
tr
td(off) t off
tf
Unclamped Inductive Switching Test Circuit & Waveforms
L VDS ID RG 10V
tp
BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD BVDSS IAS VDD ID (t) VDD
tp
DUT
VDS (t) Time
©2000 Fairchild Semiconductor International
Rev. A, September 2000
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