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Details, datasheet, quote on part number:FQB33N10L
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| Part: | FQB33N10L |
| Category: | Discrete => Transistors => FETs (Field Effect Transistors) => MOSFETs => N-Channel |
| Description: | 100V N-channel Logic Level QFET |
| Company: | Fairchild Semiconductor |
| Datasheet: | Download FQB33N10L datasheet File size : 676 kB |
| Request For quote: | Find where to buy FQB33N10L
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Datasheet text preview:
FQB33N10L / FQI33N10L
September 2000
FQB33N10L / FQI33N10L
100V LOGIC N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for low voltage applications such as high efficiency switching DC/DC converters, and DC motor control.
QFET
Features
· · · · · · · 33A, 100V, RDS(on) = 0.052 @VGS = 10 V Low gate charge ( typical 30 nC) Low Crss ( typical 70 pF) Fast switching 100% avalanche tested Improved dv/dt capability 175°C maximum junction temperature rating
TM
D
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S
D2-PAK
FQB Series
GDS
I2-PAK
FQI Series
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Absolute Maximum Ratings
Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD
TC = 25°C unless otherwise noted
Paramet er Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C) Drain Current - Pulsed
(Note 1)
FQB33N10L / FQI33N10L 100 33 23 132 ± 20
(Note 2) (Note 1) (Note 1) (Note 3)
Units V A A A V mJ A mJ V/ns W W W/°C °C °C
Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA = 25°C) *
430 33 12.7 6. 0 3.75 127 0.85 -55 to +175 300
TJ, TSTG TL
Power Dissipation (TC = 25°C) - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds
Thermal Characteristics
Symbol RJ C RJ A RJ A P arameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient * Thermal Resistance, Junction-to-Ambient Typ ---M ax 1. 18 40 62. 5 Units °C/W °C/W °C/W
* When mounted on the minimum pad size recommended (PCB Mount)
©2000 Fairchild Semiconductor International
Rev. A, September 2000
FQB33N10L / FQI33N10L
Electrical Characteristics
Symbol P a r a m e te r
TC = 25°C unless otherwise noted
Test Conditions
Min
Typ
Ma x
Units
Off Characteristics
BVDSS BVDSS / TJ IDSS IGSSF IGSSR Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25°C VDS = 100 V, VGS = 0 V VDS = 80 V, TC = 150°C VGS = 20 V, VDS = 0 V VGS = -20 V, VDS = 0 V 100 ------0.09 ------1 10 100 -100 V V/°C µA µA nA nA
On Characteristics
VGS(th) RDS(on) gFS Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance VDS = VGS, ID = 250 µA VGS = 10 V, ID = 16.5 A VGS = 5 V, ID = 16.5 A VDS = 30 V, ID = 16.5 A
(Note 4)
1.0 ---
-0. 039 0. 043 27
2. 0 0. 052 0. 055 --
V S
Dynamic Characteristics
Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz ---125 0 305 70 16 30 400 90 pF pF pF
Switching Characteristics
td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 80 V, ID = 33 A, VGS = 5 V VDD = 50 V, ID = 33 A, RG = 25
(Note 4, 5)
------(Note 4, 5)
17 470 70 120 30 4. 7 16
45 950 150 250 40 ---
ns ns ns ns nC nC nC
--
Drain-Source Diode Characteristics and Maximum Ratings
IS ISM VSD trr Qrr Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 33 A Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = 33 A, dIF / dt = 100 A/µs
(Note 4) (Note 6)
------
---90 0.26
33 132 1. 5 ---
A A V ns µC
Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 0.59mH, IAS = 33A, VDD = 25V, RG = 25 , Starting TJ = 25°C 3. ISD 33A, di/dt 300A/µs, VDD BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature
©2000 Fairchild Semiconductor International
Rev. A, September 2000
FQB33N10L / FQI33N10L
Typical Characteristics
10
2
ID, Drain Current [A]
10
1
ID, Drain Current [A]
VGS 10.0 V 8.0 V 6.0 V 5.0 V 4.5 V 4.0 V 3.5 V Bottom : 3.0 V Top :
10
2
10
1
175
25
10
0
-55
Notes : 1. VDS = 30V 2. 250 Pulse Test s
Notes : 1. 250 Pulse Test s 2. TC = 25
10 -1 10
0
10
0
10
1
10
-1
0
2
4
6
8
10
VDS, Drain-Source Voltage [V]
VGS, Gate-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
0.20
10
2
0.16
RDS(ON) [ ], Drain-Source On-Resistance
IDR , Reverse Drain Current [A]
VGS = 5V
0.12
10
1
VGS = 10V
0.08
10
0
0.04
Note : TJ = 25
175
25
Notes : 1. VGS = 0V 2. 250 Pulse Test s
0.00
0
30
60
90
120
10
-1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
ID, Drain Current [A]
VSD, Source-Drain voltage [V]
Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature
3600
3000
Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd
12
10
VGS, Gate-Source Voltage [V]
VDS = 50V
8
2400
Capacitance [pF]
VDS = 80V
1800
Ciss Coss
Notes : 1. VGS = 0 V 2. f = 1 MHz
6
1200
4
Crss
600
2
Note : ID = 33A
0 -1 10
10
0
10
1
0
0
10
20
30
40
50
VDS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
©2000 Fairchild Semiconductor International
Rev. A, September 2000
FQB33N10L / FQI33N10L
Typical Characteristics
(Continued)
1.2
3.0
2.5
BV DSS , (Normalized) Drain-Source Breakdown Voltage
RDS(ON) , (Normalized) Drain-Source On-Resistance
1.1
2.0
1.0
1.5
1.0
0.9
Notes : 1. VGS = 0 V 2. ID = 250 A
0.5
Notes : 1. VGS = 10 V 2. ID = 16.5 A
0.8 -100
-50
0
50
100
o
150
200
0.0 -100
-50
0
50
100
o
150
200
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation vs. Temperature
Figure 8. On-Resistance Variation vs. Temperature
35
Oper ation in This Area is Limited by R DS(on)
2
30 25
10
ID , Drain Current [A]
ID , Drain Current [A]
100 µs 1 ms 10 ms
20 15 10 5 0 25
10
1
DC
Notes : 1. TC = 25 C
o
10
0
2. TJ = 175 C 3. Single Pulse
0
o
10
10
1
10
2
50
75
100
125
150
175
VDS, Drain-Source Voltage [V]
TC, Case Temperature []
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current vs. Case Temperature
(t), T h e rm a l R e s p o n s e
10
0
D = 0 .5
0 .2 0 .1
10
-1
N otes : 1 . Z J C( t ) = 1 . 1 8 / W M a x . 2 . D u t y F a c t o r , D = t 1 /t 2 3 . T J M - T C = P D M * Z J C( t )
0 .0 5
P DM
0 .0 2 0 .0 1 s in g le p u ls e
10
-2
JC
t1
t2
Z
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ]
Figure 11. Transient Thermal Response Curve
©2000 Fairchild Semiconductor International
Rev. A, September 2000
FQB33N10L / FQI33N10L
Gate Charge Test Circuit & Waveform
50K 12 V 200nF 300 nF
Same Type as DUT VDS
VGS Qg 5V Qgs Qgd
VGS
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS RG 5V VGS
RL VDD
VDS
90 %
DUT
VGS
10 %
td( on) t on
tr
td( of f) t off
tf
Unclamped Inductive Switching Test Circuit & Waveforms
L VDS ID RG 10V
tp
BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD BVDSS IAS VDD ID (t) VDD
tp
DUT
VDS (t) Time
©2000 Fairchild Semiconductor International
Rev. A, September 2000
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