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Details, datasheet, quote on part number:FQD7N10L
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| Part: | FQD7N10L |
| Category: | Discrete => Transistors => FETs (Field Effect Transistors) => MOSFETs => N-Channel |
| Description: | 100V N-channel Logic Level QFET |
| Company: | Fairchild Semiconductor |
| Datasheet: | Download FQD7N10L datasheet File size : 563 kB |
| Request For quote: | Find where to buy FQD7N10L
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Datasheet text preview:
FQD7N10L / FQU7N10L
December 2000
FQD7N10L / FQU7N10L
100V LOGIC N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation modes. These devices are well suited for low voltage applications such as high efficiency switching DC/DC converters, and DC motor cont rol.
QFET
Features
· · · · · · · 5.8A, 100V, RDS(on) = 0.35 @VGS = 10 V Low gate charge ( typical 4.6 nC) Low Crss ( typical 12 pF) Fast switching 100% avalanche tested Improved dv/dt capability Low level gate drive requirments allowing direct operation from logic drives
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D-PAK
FQD Series
I-PAK
GDS
FQU Series
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Absolute Maximum Ratings
Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD
TC = 25°C unless otherwise noted
Paramet er Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C) Drain Current - Pulsed
(Note 1)
FQD7N10L / FQU7N10L 100 5. 8 3.67 23.2 ± 20
(Note 2) (Note 1) (Note 1) (Note 3)
Units V A A A V mJ A mJ V/ns W W W/°C °C °C
Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA = 25°C) * Power Dissipation (TC = 25°C)
50 5. 8 2. 5 6. 0 2. 5 25 0. 2 -55 to +150 300
TJ, TSTG TL
- Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds
Thermal Characteristics
Symbol RJ C RJ A RJ A P arameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient * Thermal Resistance, Junction-to-Ambient Typ ---M ax 5.0 50 110 Units °C/W °C/W °C/W
* When mounted on the minimum pad size recommended (PCB Mount)
©2000 Fairchild Semiconductor International Rev. A2, December 2000
FQD7N10L / FQU7N10L
Electrical Characteristics
Symbol P a r a m e te r
TC = 25°C unless otherwise noted
Test Conditions
Min
Typ
Ma x
Units
Off Characteristics
BVDSS BVDSS / TJ IDSS IGSSF IGSSR Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25°C VDS = 100 V, VGS = 0 V VDS = 80 V, TC = 125°C VGS = 20 V, VDS = 0 V VGS = -20 V, VDS = 0 V 100 ------0. 1 ------1 10 100 -100 V V/°C µA µA nA nA
On Characteristics
VGS(th) RDS(on) gFS Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance VDS = VGS, ID = 250 µA VGS = 10 V, ID = 2.9 A VGS = 5 V, ID = 2.9 A VDS = 30 V, ID = 2.9 A
(Note 4)
1.0 ---
-0. 275 0. 300 4. 6
2. 0 0.35 0.38 --
V S
Dynamic Characteristics
Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz ---220 55 12 290 72 15 pF pF pF
Switching Characteristics
td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 80 V, ID = 7.3 A, VGS = 5 V
(Note 4, 5)
VDD = 50 V, ID = 7.3 A, RG = 25
(Note 4, 5)
--------
9 100 17 50 4. 6 1. 0 2. 6
30 210 45 110 6. 0 ---
ns ns ns ns nC nC nC
Drain-Source Diode Characteristics and Maximum Ratings
IS ISM VSD trr Qrr Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 5.8 A Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = 7.3 A, dIF / dt = 100 A/µs
(Note 4)
------
---70 140
5. 8 23.2 1. 5 ---
A A V ns nC
Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 2.23mH, IAS = 5.8A, VDD = 25V, RG = 25 , Starting TJ = 25°C 3. ISD 7.3A, di/dt 300A/µs, VDD BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature
©2000 Fairchild Semiconductor International
Rev. A2, December 2000
FQD7N10L / FQU7N10L
Typical Characteristics
10
1
ID, Drain Current [A]
ID , Drain Current [A]
VGS 10.0 V 8.0 V 6.0 V 5.0 V 4.5 V 4.0 V 3.5 V Bottom : 3.0 V Top :
10
1
150
10
0
10
0
25 -55
Notes : 1. VDS = 30V 2. 250 Pulse Test s
Notes : 1. 250 Pulse Test s 2. TC = 25
10
-1
10
-1
10
0
10
1
10
-1
0
2
4
6
8
10
VDS, Drain-Source Voltage [V]
VGS , Gate-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
1.5
VGS = 5V
RDS(ON) [ ], Drain-Source On-Resistance
0.9
VGS = 10V
0.6
IDR , Reverse Drain Current [A]
1.2
10
1
10
0
150
25
Notes : 1. VGS = 0V 2. 250 Pulse Test s
0.3
Note : TJ = 25
0.0
0
5
10
15
20
10
-1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
ID, Drain Current [A]
VSD , Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature
600
500
Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd
12
10
VGS, Gate-Source Voltage [V]
VDS = 50V
8
400
Capacitance [pF]
300
Ciss Coss
Notes : 1. VGS = 0 V 2. f = 1 MHz
VDS = 80V
6
200
4
100
Crss
2
Note : ID = 7.3 A
0 -1 10
10
0
10
1
0
0
1
2
3
4
5
6
7
8
VDS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
©2000 Fairchild Semiconductor International
Rev. A2, December 2000
FQD7N10L / FQU7N10L
Typical Characteristics
(Continued)
1.2
3.0
2.5
BV DSS , (Normalized) Drain-Source Breakdown Voltage
RDS(ON) , (Normalized) Drain-Source On-Resistance
1.1
2.0
1.0
1.5
1.0
0.9
Notes : 1. VGS = 0 V 2. ID = 250 A
0.5
Notes : 1. VGS = 5 V 2. ID = 2.9 A
0.8 -100
-50
0
50
100
o
150
200
0.0 -100
-50
0
50
100
o
150
200
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation vs. Temperature
Figure 8. On-Resistance Variation vs. Temperature
10
2
6
Operation in This Area is Limited by R DS(on)
5
ID, Drain Current [A]
1 ms 10 ms DC
10
0
ID, Drain Current [A]
10
1
100 µs
4
3
2
Notes : 1. TC = 25 C 2. TJ = 150 C 3. Single Pulse
o o
1
10
-1
10
0
10
1
10
2
0 25
50
75
100
125
150
VDS, Drain-Source Voltage [V]
TC, Case Temperature []
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current vs. Case Temperature
(t), T h e rm a l R e s p o n s e
D = 0 .5 0 .2 0 .1 0 .0 5 0 .0 2
10
-1
10
0
N o te s : 1 . Z J C( t ) = 5 . 0 /W M a x . 2 . D u ty F a c t o r , D = t1/t2 3 . T J M - T C = P D M * Z J C( t )
P DM
s in g le p u ls e
JC
0 .0 1
t1
t2
Z
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
Figure 11. Transient Thermal Response Curve
©2000 Fairchild Semiconductor International
Rev. A2, December 2000
FQD7N10L / FQU7N10L
Gate Charge Test Circuit & Waveform
50K 12 V 200nF 300 nF
Same Type as DUT VDS
VGS Qg 5V Qgs Qgd
VGS
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS RG 5V VGS
RL VDD
VDS
90 %
DUT
VGS
10 %
td( on) t on
tr
td( of f) t off
tf
Unclamped Inductive Switching Test Circuit & Waveforms
L VDS ID RG 10V
tp
BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD BVDSS IAS VDD ID (t) VDD
tp
DUT
VDS (t) Time
©2000 Fairchild Semiconductor International
Rev. A2, December 2000
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