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Details, datasheet, quote on part number:FQD7N20L
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| Part: | FQD7N20L |
| Category: | Discrete => Transistors => FETs (Field Effect Transistors) => MOSFETs => N-Channel |
| Description: | 200V N-channel Logic Level QFET |
| Company: | Fairchild Semiconductor |
| Datasheet: | Download FQD7N20L datasheet File size : 585 kB |
| Request For quote: | Find where to buy FQD7N20L
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Datasheet text preview:
FQD7N20L / FQU7N20L
December 2000
FQD7N20L / FQU7N20L
200V LOGIC N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation modes. These devices are well suited for high efficiency switching DC/DC converters, switch mode power supplies, and motor control.
QFET
Features
· · · · · · · 5.5A, 200V, RDS(on) = 0.75 @VGS = 10 V Low gate charge ( typical 6.8 nC) Low Crss ( typical 8.5 pF) Fast switching 100% avalanche tested Improved dv/dt capability Low level gate drive requirement allowing direct operation from logic drivers
TM
D
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S
D-PAK
FQD Series
I-PAK
GDS
FQU Series
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S
Absolute Maximum Ratings
Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD
TC = 25°C unless otherwise noted
Paramet er Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C) Drain Current - Pulsed
(Note 1)
FQD7N20L / FQU7N20L 200 5. 5 3.48 22 ± 20
(Note 2) (Note 1) (Note 1) (Note 3)
Units V A A A V mJ A mJ V/ns W W W/°C °C °C
Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA = 25°C) * Power Dissipation (TC = 25°C)
73 5. 5 4. 5 5. 5 2. 5 45 0.36 -55 to +150 300
TJ, TSTG TL
- Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds
Thermal Characteristics
Symbol RJ C RJ A RJ A P arameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient * Thermal Resistance, Junction-to-Ambient Typ ---M ax 2. 78 50 110 Units °C/W °C/W °C/W
* When mounted on the minimum pad size recommended (PCB Mount)
©2000 Fairchild Semiconductor International Rev. A2, December 2000
FQD7N20L / FQU7N20L
Electrical Characteristics
Symbol P a r a m e te r
TC = 25°C unless otherwise noted
Test Conditions
Min
Typ
Ma x
Units
Off Characteristics
BVDSS BVDSS / TJ IDSS IGSSF IGSSR Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25°C VDS = 200 V, VGS = 0 V VDS = 160 V, TC = 125°C VGS = 20 V, VDS = 0 V VGS = -20 V, VDS = 0 V 200 ------0.17 ------1 10 100 -100 V V/°C µA µA nA nA
On Characteristics
VGS(th) RDS(on) gFS Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance VDS = VGS, ID = 250 µA VGS = 10 V, ID = 2.75 A VGS = 5 V, ID = 2.75 A VDS = 30 V, ID = 2.75 A
(Note 4)
1.0 ---
-0.59 0.62 5. 6
2. 0 0.75 0.78 --
V S
Dynamic Characteristics
Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz ---390 55 8. 5 500 70 11 pF pF pF
Switching Characteristics
td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 160 V, ID = 6.5 A, VGS = 5 V
(Note 4, 5)
VDD = 100 V, ID = 6.5 A, RG = 25
--(Note 4, 5)
12 125 20 65 6. 8 1. 6 3. 4
35 260 50 140 9. 0 ---
ns ns ns ns nC nC nC
------
Drain-Source Diode Characteristics and Maximum Ratings
IS ISM VSD trr Qrr Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 5.5 A Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = 6.5 A, dIF / dt = 100 A/µs
(Note 4)
------
---110 0.44
5. 5 22 1. 5 ---
A A V ns µC
Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 3.6mH, IAS = 5.5A, VDD = 50V, RG = 25 , Starting TJ = 25°C 3. ISD 6.5A, di/dt 300A/µs, VDD BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature
©2000 Fairchild Semiconductor International
Rev. A2, December 2000
FQD7N20L / FQU7N20L
Typical Characteristics
Top :
10
1
Bottom :
ID, Drain Current [A]
ID, Drain Current [A]
VGS 10 V 8.0 V 6.0 V 5.0 V 4.5 V 4.0 V 3.5 V 3.0 V
10
1
10
0
10
0
150
25 -55
10
-1
Notes : 1. 250 Pulse Test s 2. TC = 25
Notes : 1. VDS = 30V 2. 250 Pulse Test s
10
-1
10
-1
10
0
10
1
0
2
4
6
8
10
VDS, Drain-Source Voltage [V]
VGS, Gate-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
4
10
1
RDS(on) [], Drain-Source On-Resistance
2
VGS = 10V
IDR , Reverse Drain Current [A]
3
VGS = 5V
10
0
1
Note : TJ = 25
150
25
Notes : 1. VGS = 0V 2. 250 Pulse Test s
0
0
3
6
9
12
15
10
-1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
ID , Drain Current [A]
VSD, Source-Drain voltage [V]
Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature
800
Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd
12
10
VGS, Gate-Source Voltage [V]
600
VDS = 40V
8
Capacitance [pF]
Ciss
400
VDS = 100V VDS = 160V
6
Coss
200
Notes : 1. VGS = 0 V 2. f = 1 MHz
4
Crss
2
Note : ID = 6.5 A
0 -1 10
0 10
0
10
1
0
3
6
9
12
15
VDS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
©2000 Fairchild Semiconductor International
Rev. A2, December 2000
FQD7N20L / FQU7N20L
Typical Characteristics
(Continued)
1.2
3.0
2.5
BV DSS , (Normalized) Drain-Source Breakdown Voltage
RDS(ON) , (Normalized) Drain-Source On-Resistance
1.1
2.0
1.0
1.5
1.0
0.9
Notes : 1. VGS = 0 V A 2. ID = 250
0.5
Notes : 1. VGS = 10 V 2. ID = 3.25 A
0.8 -100
-50
0
50
100
o
150
200
0.0 -100
-50
0
50
100
o
150
200
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation vs. Temperature
Figure 8. On-Resistance Variation vs. Temperature
10
2
6
Operation in This Area is Limited by R DS(on)
5
ID, Drain Current [A]
1 ms 10 ms DC
10
0
ID, Drain Current [A]
10
1
100 µs
4
3
2
Notes : 1. TC = 25 C 2. TJ = 150 C 3. Single Pulse
o o
1
10
-1
10
0
10
1
10
2
0 25
50
75
100
125
150
VDS, Drain-Source Voltage [V]
TC, Case Temperature []
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current vs. Case Temperature
(t), T h e rm a l R e s p o n s e
D = 0 .5
10
0
0 .2 0 .1 0 .0 5
10
-1
N o te s : 1 . Z J C( t) = 2 .7 8 /W M a x . 2 . D u ty F a c to r , D = t1 /t2 3 . T JM - T C = P D M * Z J C( t)
0 .0 2 0 .0 1 s in g le p u ls e
P DM t1 t2
Z
JC
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
Figure 11. Transient Thermal Response Curve
©2000 Fairchild Semiconductor International
Rev. A2, December 2000
FQD7N20L / FQU7N20L
Gate Charge Test Circuit & Waveform
50K 12 V 200nF 300 nF
Same Type as DUT VDS
VGS Qg 5V Qgs Qgd
VGS
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS RG 5V VGS
RL VDD
VDS
90 %
DUT
VGS
10 %
td( on) t on
tr
td( of f) t off
tf
Unclamped Inductive Switching Test Circuit & Waveforms
L VDS ID RG 10V
tp
BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD BVDSS IAS VDD ID (t) VDD
tp
DUT
VDS (t) Time
©2000 Fairchild Semiconductor International
Rev. A2, December 2000
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