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Details, datasheet, quote on part number:FQG4904
 
 
Part:FQG4904
Description:FQG4904 - 400V Dual N & P-channel QFET
Company:Fairchild Semiconductor
Datasheet:Download FQG4904 datasheet   File size : 1186 kB
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Datasheet text preview:
FQG4904

QFET
FQG4904
400V Dual N & P-Channel MOSFET
General Description
These dual N and P-channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for electronic lamp ballast based on half bridge.

TM

Features
· N-Channel 0.46A, 400V, RDS(on) = 3.0 @ VGS = 10 V P-Channel -0.46A, -400V, RDS(on) = 3.0 @ VGS = -10 V · Low gate charge ( typical N-Channel 7.6 nC) ( typical P-Channel 20.0 nC) · Fast switching · Improved dv/dt capability

D2 D2 D1 D1 G2 S2 G1 S1 Pin #1

5

4

6

3

7

2

8-DIP

8

1

Absolute Maximum Ratings
Symbol VDSS ID IDM VGSS dv/dt PD TJ, TSTG

TA = 25°C unless otherwise noted

Parameter Drain-Source Voltage - Continuous (TA = 25°C) Drain Current - Continuous (TA = 100°C) Drain Curent - Pulsed
(Note 1)

N -C h a n n e l 400 0.46 0.29 3.68 ± 30
(Note 2)

P-Channel -400 -0.46 -0.29 -3.68 -4 . 5

Units V A A A V V/ns W W/°C °C

Gate-Source Voltage Peak Diode Recovery dv/dt Power Dissipation (TA = 25°C) - Derate above 25°C Operating and Storage Temperature Range

4. 5 1. 6 0. 013 -55 to +150

Thermal Characteristics
Symbol RJ A P a rameter Thermal Resistance, Junction-to-Ambient
(Note 5a)

Typ --

Max 78

Units °C/W

©2002 Fairchild Semiconductor Corporation

Rev. A1, April 2002

FQG4904

Electrical Characteristics
Symbol P a r a m e te r

TA = 25°C unless otherwise noted

Test Conditions

Type

M in

Typ

Ma x

Units

Off Characteristics
BVDSS BVDSS / TJ Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient VGS = 0 V, ID = 250 µA VGS = 0 V, ID = -250 µA ID = 250 µA, Referenced to 25°C ID = -250 µA, Referenced to 25°C VDS = 400 V, VGS = 0 V VDS = 320 V, TA = 125°C VDS = -400 V, VGS = 0 V VDS = -320 V, TA = 125°C IGSSF IGSSR Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse VGS = 30 V, VDS = 0 V VGS = -30 V, VDS = 0 V N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch All A ll 400 -400 ----------0.47 -0.3 ----------10 100 -10 -100 100 -1 0 0 V V V/°C V/ ° C µA µA µA µA nA nA

IDSS

Zero Gate Voltage Drain Current

On Characteristics
VGS(th) RDS(on) gFS Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance VDS = VGS, ID = 250 µA VDS = VGS, ID = -250 µA VGS = 10 V, ID = 0.23 A VGS = -10 V, ID = -0.23 A VDS = 40 V, ID = 0.23 A VDS = -40 V, ID = -0.23 A N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch 2.0 -2.0 ------2.0 2.2 0.8 1.1 4.0 -4.0 3.0 3. 0 --V V S S

Dynamic Characteristics
Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance N-C hannel VDS = 25 V, VGS = 0 V, f = 1.0 MHz P -C h a n n e l VDS = -25 V, VGS = 0 V, f = 1.0 MHz N-Ch P-Ch N-Ch P-C h N -Ch P-Ch ------235 500 40 85 6.5 14 300 645 55 110 8. 5 18.5 pF pF pF pF pF pF

Switching Characteristics
td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge N-C hannel VDD = 200 V, ID = 0.46 A, RG = 25 P -C h a n n e l VDD = -200 V, ID = -0.46 A, RG = 25
(Note 3,4)

N-C hannel VDS = 320 V, ID = 0.46 A, VGS = 10 V P -C h a n n e l VDS = -320 V, ID = -0.46 A, (Note 3,4) VGS = -10 V

N-Ch P-Ch N-Ch P-Ch N -C h P-Ch N -C h P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch

---------------

6.5 10 16 21 28 85 34 56 7.6 20 1.2 2.7 3.3 9.9

25 30 40 52 65 180 80 120 10 26 -----

ns ns ns ns ns ns ns ns nC nC nC nC nC nC

©2002 Fairchild Semiconductor Corporation

Rev. A1, April 2002

FQG4904

Electrical Characteristics (Continued)
Symbol P a r a m e te r Test Conditions Type Mi n Typ Ma x Units

Drain-Source Diode Characteristics and Maximum Ratings
IS ISM VSD trr Qrr trr Qrr Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = 0.46 A VGS = 0 V, IS = -0.46 A VGS = 0 V, IS = 0.46 A, (Note 3) dIF / dt = 100 A/µs VGS = 0 V, IS = -0.46 A, (Note 3) dIF / dt = 100 A/µs N-Ch P -C h N-Ch P -C h N-Ch P-Ch N-Ch P -C h ----------------104 248 117 497 0.46 -0.46 3.68 -3.68 1.4 -5. 0 ----A A A A V V ns nC ns nC

Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. ISD 0.46A, di/dt 200A/µs, VDD BVDSS, Starting TJ = 25°C 3. Pulse Test : Pulse width 300µs, Duty cycle 2% 4. Essentially independent of operating temperature 5. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance. RCA is determined by the user's board design Maximum RJA using the different board layouts on 3"x4.5" FR-4 PCB in a still air environment : a. 78°C/W when mounted without any pad copper b. 60°C/W when mounted on a 4.5 in2 pad of 2oz copper. In such an environment, the power dissipation can be enhanced up to 2.1W

©2002 Fairchild Semiconductor Corporation

Rev. A1, April 2002

FQG4904

Typical Characteristics : N-Channel

10

0

ID , Drain Current [A]

ID, Drain Current [A]

VGS 15.0 V 10.0 V 8.0 V 6.0 V 5.5 V 5.0 V 4.5 V Bottom : 4.0 V Top :

10

0

150

25 -55

10

-1

Notes : 1. 250 s Pulse Test 2. TA = 25

Notes : 1. VDS = 40V 2. 250 s Pulse Test

10

-1

10

0

10

1

10

-1

0

2

4

6

8

10

VDS, Drain-Source Voltage [V]

VGS , Gate-Source Voltage [V]

Figure 1. On-Region Characteristics

Figure 2. Transfer Characteristics

10

8

RDS(ON) [ ], Drain-Source On-Resistance

VGS = 10V
6

IDR, Reverse Drain Current [A]

10

0

VGS = 20V
4

2
Note : TJ = 25

150

25

Notes : 1. VGS = 0V 2. 250 s Pulse Test

0

0

2

4

6

8

10

-1

0.2

0.4

0.6

0.8

1.0

1.2

1.4

ID, Drain Current [A]

VSD, Source-Drain voltage [V]

Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage

Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature
12

500

Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd

VDS = 80V
10

400

VDS = 200V VDS = 320V

Ciss

VGS, Gate-Source Voltage [V]

8

Capacitance [pF]

300

Coss
200

6

Crss
100

Note ; 1. VGS = 0 V 2. f = 1 MHz

4

2
Note : ID = 0.46 A

0 -1 10

10

0

10

1

0

0

2

4

6

8

10

VDS, Drain-Source Voltage [V]

QG, Total Gate Charge [nC]

Figure 5. Capacitance Characteristics

Figure 6. Gate Charge Characteristics

©2002 Fairchild Semiconductor Corporation

Rev. A1, April 2002

FQG4904

Typical Characteristics : N-Channel (Continued)

1.2

2.5

BV DSS , (Norm lized) a Drain-Source Breakdown Voltage

2.0

RDS(ON) , (Normalized) Drain-Source On-Resistance

1.1

1.5

1.0

1.0

0.9

Notes : 1. VGS = 0 V 2. ID = 250 A

0.5

Notes : 1. VGS = -10 V 2. ID = -0.23 A

0.8 -100

-50

0

50

100
o

150

200

0.0 -100

-50

0

50

100
o

150

200

TJ, Junction Temperature [ C]

TJ, Junction Temperature [ C]

Figure 7. Breakdown Voltage Variation vs. Temperature
0.5
Operation in This Area is Limited by R DS(on)

Figure 8. On-Resistance Variation vs. Temperature

10

1

0.4

10

0

10 ms
-1

10

100 ms 1s DC
Notes :

10

-2

1. TA = 25 C 2. TJ = 150 C 3. Single Pulse
o

o

10

-3

10

0

10

1

10

2

10

3

ID, Drain Current [A]

ID, Drain Current [A]

100 µs 1 ms

0.3

0.2

0.1

0.0 25

50

75

100

125

150

VDS, Drain-Source Voltage [V]

TA, Ambient Temperature []

Figure 9. Maximum Safe Operating Area

Figure 10. Maximum Drain Current vs. Ambient Temperature

Z (t), T h e rm a l R e s p o n s e

10

2

D = 0 .5 0 .2
10
1

0 .1 0 .0 5 0 .0 2

PDM t1 t2

J A

10

0

0 .0 1 s in g le p u ls e

N o te s : 1 . Z JA ( t) = 7 8 / W M a x . 2 . D u t y F a c t o r , D = t1/t 2 3 . T JM - T A = P D M * Z JA ( t)

10

-1

10

-5

10

-4

10

-3

10

-2

10

-1

10

0

10

1

10

2

10

3

t 1 , S q u a r e W a v e P u l s e D u r a t i o n [s e c ]

Figure 11. Transient Thermal Response Curve

©2002 Fairchild Semiconductor Corporation

Rev. A1, April 2002