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Details, datasheet, quote on part number:FQH18N50V2
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FQH18N50V2
QFET
FQH18N50V2
500V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficient switched mode power supplies, active power factor correction, electronic lamp ballast based on half bridge topology.
®
Features
· · · · · · 20A, 500V, RDS(on) = 0.265 @VGS = 10 V Low gate charge ( typical 42 nC) Low Crss ( typical 11 pF) Fast switching 100% avalanche tested Improved dv/dt capability
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G! GD S
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TO-247
FQH Series
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S
Absolute Maximum Ratings
Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL
TC = 25°C unless otherwise noted
Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C) Drain Current - Pulsed
(Note 1)
F Q H18N50V 2 500 20 12.7 80 ± 30
(Note 2) (Note 1) (Note 1) (Note 3)
Units V A A A V mJ A mJ V/ns W W/°C °C °C
Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C)
330 20 27.7 4. 5 277 2.22 -55 to +150 300
- Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds
Thermal Characteristics
Symbol RJ C RC S RJ A P arameter Thermal Resistance, Junction-to-Case Thermal Resistance, Case-to-Sink Thermal Resistance, Junction-to-Ambient Typ -0. 24 -M ax 0. 45 -40 Units °C/W °C/W °C/W
©2003 Fairchild Semiconductor Corporation
Rev. A, December 2003
FQH18N50V2
Electrical Characteristics
Symbol P a r a m e te r
TC = 25°C unless otherwise noted
Test Conditions
Min
Typ
M ax
Units
Off Characteristics
BVDSS BVDSS / TJ IDSS IGSSF IGSSR Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25°C VDS = 500 V, VGS = 0 V VDS = 400 V, TC = 125°C VGS = 30 V, VDS = 0 V VGS = -30 V, VDS = 0 V 500 ------0.5 ------1 10 100 -100 V V/°C µA µA nA nA
On Characteristics
VGS(th) RDS(on) gFS Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance VDS = VGS, ID = 250 µA VGS = 10 V, ID = 10 A VDS = 40 V, ID = 10 A
(Note 4)
3. 0 ---
-0.225 16
5.0 0.265 --
V S
Dynamic Characteristics
Ciss Coss Crss Coss Coss eff. Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance VDS = 400 V, VGS = 0 V, f = 1.0 MHz VDS = 0V to 400 V, VGS = 0 V VDS = 25 V, VGS = 0 V, f = 1.0 MHz -----2530 300 11 76 150 3290 390 14. 3 --pF pF pF pF pF
Switching Characteristics
td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 400 V, ID = 18 A, VGS = 10 V
(Note 4, 5)
VDD = 250 V, ID = 18 A, RG = 25
(Note 4, 5)
--------
40 150 95 110 42 12 14
90 310 200 230 55 ---
ns ns ns ns nC nC nC
Drain-Source Diode Characteristics and Maximum Ratings
IS ISM VSD trr Qrr Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 20 A Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = 18 A, dIF / dt = 100 A/µs
(Note 4)
------
---420 5.4
20 80 1.4 ---
A A V ns µC
Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 1.5mH, IAS = 20A, VDD = 50V, RG = 25 , Starting TJ = 25°C 3. ISD 18A, di/dt 200A/µs, VDD BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature
©2003 Fairchild Semiconductor Corporation
Rev. A, December 2003
FQH18N50V2
Typical Characteristics
VG S Top : 15.0 V 10.0 V 8.0 V 6.5 V 6.0 V Bottom : 5.5 V
1
ID , Drain Current [A]
10
7.0 V
10
1
150
ID, Drain Current [A]
25 10
0
10
0
-55
Notes : 1. 250 s Pulse Test 2. TC = 25
Notes : 1. VDS = 40V 2. 250 s Pulse Test
10
-1
10
-1
10
0
10
1
10
-1
2
4
6
8
10
VDS, Drain-Source Voltage [V]
VGS , Gate-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
1.0
0.8
IDR , Reverse Drain Current [A]
Drain-Source On-Resistance
10
1
R DS(ON) [ ],
0.6
VGS = 10V
0.4
V GS = 20V
0.2
Note : TJ = 25
10
0
150
25
Notes : 1. VGS = 0V 2. 250 s Pulse Test
0.0 0 10 20 30 40 50 60 70
10
-1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
ID, Drain Current [A]
VSD , Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature
7000
C iss = C gs + Cgd (Cds = shorted) C oss = Cds + Cgd C rss = C gd
12
6000 5000
VDS = 100V
10
VDS = 250V VDS = 400V
V GS , Gate-Source Voltage [V]
8
Capacitance [pF]
4000 3000
6
2000 1000
Coss
Ciss
Notes : 1. VGS = 0 V 2. f = 1 MHz
4
2
Note : ID = 18A
Crss
0 -1 10 10
0
10
1
0 0 5 10 15 20 25 30 35 40 45
VDS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
©2003 Fairchild Semiconductor Corporation
Rev. A, December 2003
FQH18N50V2
Typical Characteristics
(Continued)
1.2
3.0
BV DSS , (Normalized) Drain-Source Breakdown Voltage
R DS(ON) , (Normalized)
1.1
Drain-Source On-Resistance
2.5
2.0
1.0
1.5
1.0
Notes :
0.9
Notes : 1. VGS = 0 V 2. ID = 250 A
0.5
1. VGS = 10 V 2. ID = 10 A
0.8 -100
-50
0
50
100
o
150
200
0.0 -100
-50
0
50
100
o
150
200
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation vs. Temperature
Figure 8. On-Resistance Variation vs. Temperature
20
O p e ra tion in This Area is Limited by R
DS(on)
10
2
15
ID , Drain Current [A]
1 ms
10
1
10 ms DC
ID, Drain Current [A]
10 0 us
10
10
0
Notes : 1. TC = 25 C 2. TJ = 150 C 3. Single Pulse
o o
5
10
-1
10
0
10
1
10
2
10
3
0 25
50
75
100
125
150
VD S , Drain-Source Voltage [V]
TC, Case Temperature []
Figure 9. Maximum Safe Operating Area .
Figure 10. Maximum Drain Current vs. Case Temperature
10
0
(t), T h e rm a l R e s p o n s e
D = 0 .5
10
-1
0 .2 0 .1 0 .0 5 0 .0 2 0 .0 1 s i n g l e p u ls e
N o te s : 1. Z
JC
( t ) = 0 .4 5 /W M a x .
2 . D u t y F a c to r , D = t1 /t 2 3 . T JM - T C = P DM * Z
JC
(t)
P DM t1 t2
JC
Z
10
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ]
Figure 11. Transient Thermal Response Curve
©2003 Fairchild Semiconductor Corporation
Rev. A, December 2003
FQH18N50V2
Gate Charge Test Circuit & Waveform
50K 12 V 200nF 300 nF
Same Type as DUT VDS
VGS 10V Qgs Qg
VGS
Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS RG VGS
RL VDD
VDS
90%
10V
DUT
VGS
10%
td(on) t on
tr
td(off ) t off
tf
Unclamped Inductive Switching Test Circuit & Waveforms
L VDS ID RG 10V
tp
BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD BVDSS IAS VDD ID (t) VDD
tp
DUT
VDS (t) Time
©2003 Fairchild Semiconductor Corporation
Rev. A, December 2003
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