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Details, datasheet, quote on part number:FQP1N60
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| Part: | FQP1N60 |
| Category: | Discrete => Transistors => FETs (Field Effect Transistors) => MOSFETs => Power MOSFETs |
| Description: | 600V N-channel QFET |
| Company: | Fairchild Semiconductor |
| Datasheet: | Download FQP1N60 datasheet File size : 532 kB |
| Request For quote: | Find where to buy FQP1N60
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Datasheet text preview:
QFET N -CHANNEL
FQP1N60
FEATURES
BVDSS = 600V · · · · · · · · Advanced New Design Avalanche Rugged Technology Rugged Gate Oxide Technology Very Low Intrinsic Capacitances Excellent Switching Characteristics Unrivalled Gate Charge: 5.0nC (Typ.) Extended Safe Operating Area Lower RDS(ON): 9.3 (Typ.)
1 2 3
RDS(ON) = 11.5 ID = 1.2A
TO-220
1. Gate 2. Drain 3. Source
ABSOLUTE MAXIMUM RATINGS
Symbol V DSS ID I DM V GS EAS IAR EAR dv/dt PD TJ, TSTG TL C hara cteris tics Drain-to-Source Voltage Continuous Drain Current (TC = 25°C) Continuous Drain Current (TC = 100°C) Drain Current-Pulsed Gate-to-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation (TC = 25°C) Linear Derating Factor Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8" from case for 5-seconds y x x z x Value 600 1.2 0. 76 4.8 ± 30 50 1.2 4.0 4.5 40 0. 32 -55 to +150 °C 300 A V mJ A mJ V/ns W W/°C Units V A
THERMAL RESISTANCE
Symbol RJC R C S RJA C hara cteris tics Junction-to-Case Case-to-Sink Junction-to-Ambient Typ. - 0.5 - M ax. 3. 13 - 62. 5 °C/W Units
REV. B
1
© 1999 Fairchild Semiconductor Corporation
FQP1N60
QFET N-CHANNEL
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise specified)
Symbol B V DSS BV/TJ VGS(th) IGSS Characteristics D rain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage, Forward Gate-Source Leakage, Reverse D rain-to-Source Leakage Current Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance R everse Transfer Capacitance Turn-On Delay Time R ise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain (Miller) Charge Min. 60 0 - 3. 0 - - - - - - - - - - - - - - - - Typ. - 0. 4 - - - - - 9. 3 0. 9 1 20 20 3. 0 5 25 7 25 5. 0 1. 0 2. 6 M ax. - - 5.0 100 - 100 10 100 11.5 - 150 25 4.0 20 60 25 60 6.0 - - nC VDS=480V, VGS=10V ID=1.2A See Fig 6 & Fig 12 { | ns VDD=300V, ID=1.2A RG=50 See Fig 13 {| pF Units V V/°C V nA µA S Test Conditions VGS=0V, ID=250µA ID=250µA,
See Fig 7
VDS=5V, ID=250µA VGS=30V VGS= -30V VDS=600V VDS=480V, TC=125°C VGS=10V, ID=0.6A VDS=50V, ID=0.6A VGS=0V, VDS=25V f=1MHz See Fig 5 { {
I DSS RDS(on) gfs Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS
Symbol IS ISM VSD trr Qrr Characteristics C ontinuous Source Current Pulsed-Source Current D iode Forward Voltage R everse Recovery Time R everse Recovery Charge x { Min. - - - - - Typ. - - - 160 0.3 M ax. 1.2 4.8 1.4 - - A V ns µC Units Test Conditions Integral reverse pn-diode in the MOSFET TJ=25°C, IS=1.2A, VGS=0V TJ=25°C, IF=1.2A, VDD=480V diF/dt=100A/µs {
Notes: x Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature y L=64mH, IAS=1.2A, VDD=50V, RG=25, Starting TJ =25°C z ISD 1.2A, di/dt 200A/µs, VDD BVDSS, Starting TJ =25°C { Pulse Test: Pulse Width 300µs, Duty Cycle 2% | Essentially Independent of Operating Temperature
2
QFET N -CHANNEL
FQP1N60
Fig 1. Output Characteristics
VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V Bottom : 5.5 V Top :
Fig 2. Transfer Characteristics
10
0
ID, Drain Current [A]
ID , Drain Current [A]
10
0
150¡É
10
-1
25¡É -55¡É
¡Ø Note 1. VDS = 50V 2. 250¥ìs Pulse Test
10
-2
¡Ø Note : 1. 250¥ìs Pulse Test 2. TC = 25¡É
10
-1
10
0
10
1
10
-1
2
4
6
8
10
VDS, Drain-Source Voltage [V]
VGS , Gate-Source Voltage [V]
Fig 3. On-Resistance vs. Drain Current
30
Fig 4. Source-Drain Diode Forward Voltage
VGS = 10V VGS = 20V
RDS(ON) [¥Ø], Drain-Source On-Resistance
20
IDR , Reverse Drain Current [A]
25
10
0
15
10
150¡É
25¡É
¡Ø Note : 1. VGS = 0V 2. 250¥ìs Pulse Test
5
¡Ø Note : TJ = 25¡É
0 0.0
0.5
1.0
1.5
2.0
2.5
10
-1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
ID, Drain Current [A]
VSD , Source-Drain Voltage [V]
Fig 5. Capacitance vs. Drain-Source Voltage
200
Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd
Fig 6. Gate Charge vs. Gate-Source Voltage
12
VDS = 120V
10
150
VGS , Gate-Source Voltage [V]
Ciss
VDS = 300V VDS = 480V
8
Capacitances [pF]
Coss
100
6
50
Crss
¡Ø Note ; 1. VGS = 0 V 2. f = 1 MHz
4
2
¡Ø Note : ID = 1.2 A
0 -1 10
0 10
0
10
1
0
1
2
3
4
5
VDS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
3
FQP1N60
QFET N-CHANNEL
Fig 7. Breakdown Voltage vs. Temperature
1.2
3.0
Fig 8. On-Resistance vs. Temperature
BV DSS , (Normalized) Drain-Source Breakdown Voltage
2.5
1.1
R DS(ON) , (Normalized) Drain-Source On-Resistance
2.0
1.0
1.5
1.0
0.9
¡Ø Note : 1. VGS = 0 V 2. ID = 250 ¥ìA
0.5
¡Ø Note : 1. VGS = 10 V 2. ID = 0.6 A
0.8 -100
-50
0
50
100
o
150
200
0.0 -100
-50
0
50
100
o
150
200
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Fig 9. Max. Safe Operating Area
10
1
Fig 10. Max. Drain Current vs. Case Temperature
1.2
Operation in This Area is Limited by R DS(on)
ID, Drain Current [A]
1 ms
10
0
10 ms DC
ID, Drain Current [A]
3
100 µs
0.9
0.6
10
-1
¡Ø Notes : 1. TC = 25 C 2. TJ = 150 C 3. Single Pulse
o o
0.3
10
-2
10
0
10
1
10
2
10
0.0 25
50
75
100
125
150
VDS, Drain-Source Voltage [V]
[°C TC, Case Temperature [¡É]]
Fig 11. Thermal Response
( t) , T h e r m a l R e s p o n s e
D = 0 .5
10
0
0 .2 0 .1 0 .0 5
¡Ø N o te s : 1 . Z ¥ è J C( t ) = 3 .1 3 ¡ É / W M a x . 2 . D u t y F a c t o r , D = t 1 / t2 3 . T J M - T C = P D M * Z ¥ è J C( t )
PDM
10
-1
0 .0 2 0 .0 1 s in g le p u ls e
¥è JC
t1 t2
Z
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t1 , S q u a r e W a v e P u ls e D u r a tio n [ s e c ]
4
QFET N-CHANNEL
FQP1N60
Fig 12. Gate Charge Test Circuit & Waveform
5 0K 1 2V 2 00 n F 3 00n F
Same Type as DUT VDS
VGS Qg
10V
VGS
Qgs
Qg d
DUT
3mA
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
VDS RG
RL VDD
( 0.5 rated VDS )
VDS
9 0%
10V
DUT
Vin
1 0%
td( on ) t on
tr
td( of f ) t of f
tf
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
L VDS VDD ID RG VDD BVDSS IAS
BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD
ID (t) DUT VDS (t)
tp
10V
Time
5
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