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Details, datasheet, quote on part number:FQPF3P50
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Datasheet text preview:
FQPF3P50
August 2000
FQPF3P50
500V P-Channel MOSFET
General Description
These P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for electronic lamp ballast based on complimentary half bridge.
QFET
Features
· · · · · · -1.9A, -500V, RDS(on) = 4.9 @VGS = -10 V Low gate charge ( typical 18 nC) Low Crss ( typical 9.5 pF) Fast switching 100% avalanche tested Improved dv/dt capability
TM
S
!
G!
GD S
TO-220F
FQPF Series
!
D
Absolute Maximum Ratings
Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL
TC = 25°C unless otherwise noted
Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C) Drain Current - Pulsed
(Note 1)
FQPF3P50 -500 -1. 9 -1. 2 -7. 6 ± 30
(Note 2) (Note 1) (Note 1) (Note 3)
Units V A A A V mJ A mJ V/ns W W/°C °C °C
Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C)
250 -1. 9 3. 9 -4. 5 39 0.31 -55 to +150 300
- Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds
Thermal Characteristics
Symbol RJ C RJ A P arameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Typ --M ax 3.2 62. 5 Units °C/W °C/W
©2000 Fairchild Semiconductor International
Rev. A, August 2000
FQPF3P50
Elerical Characteristics
Symbol P a r a m e te r
TC = 25°C unless otherwise noted
Test Conditions
Min
Typ
M ax
Units
Off Characteristics
BVDSS BVDSS / TJ IDSS IGSSF IGSSR Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse VGS = 0 V, ID = -250 µA ID = -250 µA, Referenced to 25°C VDS = -500 V, VGS = 0 V VDS = -400 V, TC = 125°C VGS = -30 V, VDS = 0 V VGS = 30 V, VDS = 0 V -500 ------0. 42 -------1 -10 -100 100 V V/°C µA µA nA nA
On Characteristics
VGS(th) RDS(on) gFS Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance VDS = VGS, ID = -250 µA VGS = -10 V, ID = -0.95 A VDS = -50 V, ID = -0.95 A
(Note 4)
-3. 0 ---
-3.9 2.0
-5. 0 4.9 --
V S
Dynamic Characteristics
Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = -25 V, VGS = 0 V, f = 1.0 MHz ---510 70 9.5 660 90 12 pF pF pF
Switching Characteristics
td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = -250 V, ID = -2.7 A, RG = 25
(Note 4, 5)
--------
12 56 35 45 18 3.6 9.2
35 120 80 100 23 ---
ns ns ns ns nC nC nC
VDS = -400 V, ID = -2.7 A, VGS = -10 V
(Note 4, 5)
Drain-Source Diode Characteristics and Maximum Ratings
IS ISM VSD trr Qrr Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = -1.9 A Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = -2.7 A, dIF / dt = 100 A/µs
(Note 4)
------
---270 1.5
-1 . 9 -7. 6 -5. 0 ---
A A V ns µC
Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 125mH, IAS = -1.9A, VDD = -50V, RG = 25 , Starting TJ = 25°C 3. ISD -2.7A, di/dt 200A/µs, VDD BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature
©2000 Fairchild Semiconductor International
Rev. A, August 2000
FQPF3P50
Typical Characteristics
10
0
-I D , Drain Current [A]
-I D, Drain Current [A]
VGS -15.0 V -10.0 V -8.0 V -7.0 V -6.5 V -6.0 V Bottom : -5.5 V Top :
10
0
150
10
-1
25 -55
Notes : 1. VDS = -50V 2. 250 Pulse Test s
Notes : 1. 250 Pulse Test s 2. TC = 25
10
-2
10
-1
10
0
10
1
10
-1
2
4
6
8
10
-VDS, Drain-Source Voltage [V]
-VGS , Gate-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
8
7
RDS(on) [], Drain-Source On-Resistance
6
VGS = - 20V
-I DR , Reverse Drain Current [A]
VGS = - 10V
5
10
0
4
3
Note : TJ = 25
150
25
Notes : 1. VGS = 0V 2. 250 Pulse Test s
2
0
2
4
6
8
10
-1
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-ID , Drain Current [A]
-VSD , Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature
1200
1000
Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd
12
10
VDS = -100V VDS = -250V
-V GS , Gate-Source Voltage [V]
800
8
Capacitance [pF]
Ciss
600
VDS = -400V
6
400
Coss
Notes : 1. VGS = 0 V 2. f = 1 MHz
4
200
Crss
2
Note : ID = -2.7 A
0 -1 10
10
0
10
1
0
0
2
4
6
8
10
12
14
16
18
20
VDS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
©2000 Fairchild Semiconductor International
Rev. A, August 2000
FQPF3P50
Typical Characteristics
(Continued)
1.2
2.5
-BV DSS , (Normalized) Drain-Source Breakdown Voltage
2.0
RDS(ON) , (Normalized) Drain-Source On-Resistance
1.1
1.5
1.0
1.0
0.9
Notes : 1. VGS = 0 V A 2. ID = -250
0.5
Notes : 1. VGS = -10 V 2. ID = -1.35 A
0.8 -100
-50
0
50
100
o
150
200
0.0 -100
-50
0
50
100
o
150
200
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation vs. Temperature
Figure 8. On-Resistance Variation vs. Temperature
2.0
Operation in This Area is Limited by R DS(on)
10
1
1.5
-I D, Drain Current [A]
10 ms
10
0
100 ms DC
-I D, Drain Current [A]
1 ms
1.0
10
-1
Notes : 1. TC = 25 C 2. TJ = 150 C 3. Single Pulse
o o
0.5
10
-2
10
0
10
1
10
2
10
3
0.0 25
50
75
100
125
150
-VDS, Drain-Source Voltage [V]
TC, Case Temperature []
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current vs. Case Temperature
(t), T h e rm a l R e s p o n s e
D = 0 .5
10
0
0 .2 0 .1 0 .0 5
10
-1
N o te s : 1 . Z J C( t) = 3 .2 /W M a x . 2 . D u ty F a c to r , D = t 1 /t2 3 . T J M - T C = P D M * Z J C( t)
0 .0 2 0 .0 1 s in g le p u ls e
P DM t1 t2
Z
JC
10
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t1 , S q u a r e W a v e P u ls e D u ra tio n [s e c ]
Figure 11. Transient Thermal Response Curve
©2000 Fairchild Semiconductor International
Rev. A, August 2000
FQPF3P50
Gate Charge Test Circuit & Waveform
50K 12 V 200nF 300 nF
Same Type as DUT VDS
VGS -10V Qgs Qg
VGS
Qgd
DUT
-3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS RG VGS
RL VDD
td(on)
t on tr td(off )
t off tf
VGS
10%
-10V
DUT VDS
90%
Unclamped Inductive Switching Test Circuit & Waveforms
L VDS ID RG -10V
tp
BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD
tp
Time VDS (t)
VDD DUT
VDD ID (t) IAS BVDSS
©2000 Fairchild Semiconductor International
Rev. A, August 2000
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