Details, datasheet, quote on part number: FQU6N40C
Description400V N-channel Advance QFET C-series
CompanyFairchild Semiconductor
DatasheetDownload FQU6N40C datasheet
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Features, Applications

These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switched mode power supplies, electronic lamp ballasts based on half bridge topology.


4.5A, 400V, RDS(on) = 1.0 @VGS 10 V Low gate charge ( typical 16nC) Low Crss ( typical 15pF) Fast switching 100% avalanche tested Improved dv/dt capability

Parameter Drain-Source Voltage - Continuous (TC = 25C) Drain Current - Continuous (TC = 100C) Drain Current - Pulsed

Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA = 25C)* Power Dissipation (TC 25C) - Derate above 25C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds

Symbol RJC RJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient.* Thermal Resistance, Junction-to-Ambient. Typ ---Max 50 110 Units C/W

* When mounted on the minimum pad size recommended (PCB Mount)

BVDSS / TJ IDSS IGSSF IGSSR Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse VGS = 250 A, Referenced to 25C VDS 400 V, VGS 0 V VDS = 125C VGS 30 V, VDS 0 V VGS -30 V, VDS V/C A nA

VGS(th) RDS(on) gFS Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance VDS = VGS, 250 A VGS = 2.25A VDS = 2.25A

Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS 25 V, VGS = 1.0 MHz pF

td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 6A, VGS 10 V

IS ISM VSD trr Qrr Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current VGS 4.5 A Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS 6 A, dIF = 100 A/s

Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature = 13.7 mH, IAS 6 A, VDD 25 , Starting 25C 3. ISD 6A, di/dt 200A/s, VDD BVDSS, Starting 25C 4. Pulse Test : Pulse width 300s, Duty cycle 2% 5. Essentially independent of operating temperature

Figure 3. On-Resistance Variation vs Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature


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