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Details, datasheet, quote on part number:FST32211
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Datasheet text preview:
FST32211 40/48-Bit Bus Switch
April 2001 Revised July 2002
FST32211 40/48-Bit Bus Switch
General Description
The Fairchild Switch FST32211 provides up to 48-bits of high-speed CMOS TTL-compatible bus switching. The low On Resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. The device can be organized as four 12-bit, two 24-bit, or one 48-bit bus switch. When routed as a 40-bit bus switch, the device can be organized as four 10-bit, two 20-bit or one 40-bit bus switch. When OE1 is LOW, the switch is ON and Port 1A is connected to Port 1B. When OE2 is LOW, the switch is ON and Port 2A is connected to Port 2B. When OE3 is LOW, the switch is ON and Port 3A is connected to Port 3B. When OE4 is LOW, the switch is ON and Port 4A is connected to Port 4B. When OE1, OE2, OE3, or OE4 are HIGH, a high impedance state exists between the A and B Ports.
Features
I 4 switch connection between two ports I Minimal propagation delay through the switch I Low lCC I Zero bounce in flow-through mode I Control inputs compatible with TTL level I Packaged in plastic Fine Pitch Ball Grid Array (FBGA)
Ordering Code:
Order Number FST32211G (Note 1)(Note 2) Package Number BGA114A Package Description 114-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
Note 1: Ordering code "G" indicates Trays. Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Diagram
© 2002 Fairchild Semiconductor Corporation
DS500404
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FST32211
Connection Diagram
FBGA Pin Assignments
(40-Bit Routing) 1 A B C D E F G H J K L M N P R T U V 1A2 1A4 1A6 1A8 1A10 2A2 2A4 2A6 2A8 2A10 3A9 3A7 3A5 3A3 3A1 4A9 4A7 4A5 4A3 2 1A1 1A3 1A5 1A7 1A9 2A1 2A3 2A5 2A7 3A10 3A8 3A6 3A4 3A2 4A10 4A8 4A6 4A4 4A2 3 NC GND GND GND VCC VCC VCC GND 2A9 GND GND GND VCC VCC GND GND GND 4A1 OE3 4 OE 2 OE1 GND GND VCC VCC GND GND 2B9 GND GND VCC VCC VCC GND GND 4B1 OE4 NC 5 1 B1 1 B3 1 B5 1 B7 1 B9 2 B1 2 B3 2 B5 2 B7 3B10 3 B8 3 B6 3 B4 3 B2 4B10 4 B8 4 B6 4 B4 4 B2 6 1B2 1B4 1B6 1B8 1B10 2B2 2B4 2B6 2B8 2B10 3B9 3B7 3B5 3B3 3B1 4B9 4B7 4B5 4B3
(Top Thru View)
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Pin Descriptions
Pin Name OE1, OE2, OE3, OE4 1A, 2A, 3A, 4A 1B, 2B, 3B, 4B Description Bus Switch Enables Bus A Bus B
Truth Tables
Inputs OE1 L L H H Inputs OE3 L L H H OE4 L H L H OE2 L H L H Inputs/Outputs 1A, 1B 1A = 1B 1A = 1B Z Z 2A, 2B 2A = 2B Z 2A = 2B Z
Inputs/Outputs 3A, 3B 3A = 3B 3A = 3B Z Z 4A, 4B 4A = 4B Z 4A = 4B Z
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FST32211
Connection Diagram
FBGA Pin Assignments
(48-Bit Routing) 1 A B C D E F G H J K L M N P R T U V 1A2 1A4 1A6 1A10 1A12 2A4 2A6 2A8 2A10 2A12 3A11 3A9 3A7 3A5 3A3 4A11 4A9 4A5 4A3 2 1A1 1A3 1A5 1A9 1A11 2A3 2A5 2A7 2A9 3A12 3A10 3A8 3A6 3A4 4A12 4A10 4A6 4A4 4A2 3 NC 1A7 GND 1A8 2A1 2A2 VCC GND 2A11 GND GND GND 3A2 3A1 4A8 4A7 GND 4A1 OE3 4 OE 2 OE1 1B7 1B8 2B1 2B2 GND GND 2B11 GND GND VCC 3B2 3B1 4B8 4B7 4B1 OE4 NC 5 1B1 1B3 1B5 1B9 1B11 2B3 2B5 2B7 2B9 3B12 3B10 3B8 3B6 3B4 4B12 4B10 4B6 4B4 4B2 6 1B2 1B4 1B6 1B10 1B12 2B4 2B6 2B8 2B10 2B12 3B11 3B9 3B7 3B5 3B3 4B11 4B9 4B5 4B3
(Top Thru View)
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Pin Descriptions
Pin Name OE1, OE2, OE3, OE4 1A, 2A, 3A, 4A 1B, 2B, 3B, 4B Description Bus Switch Enables Bu s A Bu s B
Truth Tables
Inputs OE1 L L H H Inputs OE3 L L H H OE4 L H L H OE2 L H L H Inputs/Outputs 1A, 1B 1A = 1B 1A = 1B Z Z 2A, 2B 2A = 2B Z 2A = 2B Z
Inputs/Outputs 3A, 3B 3A = 3B 3A = 3B Z Z 4A, 4B 4A = 4B Z 4A = 4B Z
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