|
Details, datasheet, quote on part number:RMPA2455
| |
Datasheet text preview:
RMPA2455
June 2004
RMPA2455
2.42.5 GHz 1 Watt InGaP HBT Linear Power Amplifier
General Description
The RMPA2455 power amplifier is designed for high performance WLAN access point applications in the 2.4 2.5 GHz frequency band. The low profile 16 pin 3 x 3 x 0.9 mm package with internal matching on both input and output to 50 minimizes next level PCB space and allows for simplified integration. The on-chip detector provides power sensing capability while the logic control provides power saving shutdown options. The PA's low power consumption and excellent linearity are achieved using our InGaP Heterojunction Bipolar Transistor (HBT) technology.
Features
· · · · · · · · · 30 dB small signal gain 30 dBm output power @ 1 dB compression 3% EVM at 22 dBm modulated power out 5.0 V positive collector supply operation Two power saving shutdown options (bias and logic control) Integrated power detector with 20 dB dynamic range Low profile 16 pin 3 x 3 x 0.9 mm leadless package Internally matched to 50 and DC blocked RF input/ output Optimized for use in 802.11b/g Access Point applications
Device
Electrical Characteristics1 802.11g OFDM Modulation
(with 176 ms burst time, 100 ms idle time) 54 Mbps Data Rate, 16.7 MHz Bandwidth
Parameter Frequency Collector Supply Voltage Mirror Supply Voltage Gain Total Current @ 22dBm POUT EVM @ 22dBm POUT2 Detector Output @ 22dBm POUT Detector Threshold3
Notes: 1: VC1, VC2 = 5.0 Volts, VM12 = 3.3V, TA = 25°C, PA is constantly biased, 50 system. 2: Percentage includes system noise floor of EVM = 0.8%. 3: POUT measured at PIN corresponding to power detection threshold.
Min 2.4 4.5 2.8
Typ 5.0 3.3 30 195 3.0 960 4
Max 2.5 5.5 3.6
Units GHz V V dB mA % mV dBm
©2004 Fairchild Semiconductor Corporation
RMPA2455 Rev. C
RMPA2455
Electrical Characteristics1 Single Tone
Parameter Frequency Collector Supply Voltage Mirror Supply Voltage Gain Total Quiescent Current Bias Current at pin VM122 P1dB Compression Standby Current3 Shutdown Current (VM12 = 0V) Input Return Loss Output Return Loss Detector Output at P1dB Comp Detector POUT Threshold7 2nd Harmonic Output at P1dB 3rd Harmonic Output at P1dB Logic Shutdown Control (VL): Device Off, Logic High Input Device On, Logic Low Input Logic Current Turn-on Time4 Turn-off Time Spurious (Stability)5 Min 2.4 4.5 2.8 Typ 5.0 3.3 30 140 17 30 0.7 <1.0 12 10 4 6 -40 -40 Max 2.5 5.5 3.6 Units GHz V V dB mA mA dBm mA µA dB dB V dBm dBc dBc
2.0
2.4 0.0 150 <1 <1 -65
0.8
V V µA µS µS dBc
Absolute Ratings6
Symbol VC1, VC2 IC1, IC2 Parameter Positive Supply Voltage Supply Current IC1 IC2 Positive Bias Voltage Logic Voltage RF Input Power Case Operating Temperature Storage Temperature Ratings 6 120 700 4.0 5 10 -40 to +85 -55 to +150 Units V mA mA V V dBm °C °C
VM12 VL PIN TCASE TSTG
Notes: 1: VC1,VC2 = 5.0V, VM12 = 3.3V, TC = 25°C, 50 system. 2: Mirror bias current is included in the total quiescent current. 3: VL is set to Input Logic Level High for PA Off operation. 4: Measured from Device On signal turn on (Logic Low) to the point where RF POUT stabilizes to 0.5dB. 5: Load VSWR is set to 8:1 and the angle is varied 360 degrees. POUT = -30dBm to P1dB. 6: No permanent damage with only one parameter set at extreme limit. Other parameters set to typical values 7: POUT measured at PIN corresponding to power detection threshold.
©2004 Fairchild Semiconductor Corporation
RMPA2455 Rev. C
RMPA2455
Functional Block Diagram
VDET REF VDET VM12
VC2
16
15
14
13
VL
1
BIAS
VOLTAGE DETECTOR
12
N/C
RF IN
2
INPUT MATCH INT STG MATCH OUTPUT MATCH
11
RF OUT
RF IN
3
10
RF OUT
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Description VL (logic) RF IN RF IN N/C VC1 N/C N/C N/C N/C RF OUT RF OUT N/C VC2 VDET VDET REF VM12
N/C
4
9
N/C
5
6
7
8
VC1
N/C
N/C
N/C
Backside Ground
©2004 Fairchild Semiconductor Corporation
RMPA2455 Rev. C
|
|
