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Details, datasheet, quote on part number:X24512
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Datasheet text preview:
Preliminary Information 512K
X24512
1MHz 2-Wire Serial EEPROM
DESCRIPTION
64K x 8 Bit
FEATURES · 1MHz 2-wire serial interface -- Schmitt trigger input noise suppression -- Output slope control for ground bounce noise elimination · Longer battery life with lower power -- Active read current less than 1mA -- Active write current less than 3mA -- Standby current less than 1µA · 2.5V to 5.5V power supply versions · 128-byte page write mode -- Minimizes total write time per word · Internally organized 64K x 8 · Bidirectional data transfer protocol · Self-timed write cycle -- Typical write cycle time of 5ms · High reliability -- Endurance: 100,000 cycles -- Data retention: 100 years · 8-lead XBGA · 20-lead SOIC (JEDEC) · 20-lead TSSOP
The X24512 is a CMOS Serial EEPROM, internally organized 64K x 8. The device features a serial interface and software protocol allowing operation on a simple two wire bus. Two device select inputs (S0S1) allow up to four devices to share a common two wire bus. These pins have internal pull downs, so they are read as LOW if not connected. A WP pin, when pulled HIGH prevents any nonvolatile writes to the array. When not connected WP is pulled LOW, so the device is not normally protected. Xicor EEPROMs are designed and tested for applications requiring extended endurance. Inherent data retention is greater than 100 years.
BLOCK DIAGRAM
Serial EEPROM Data and Address (SDA) SCL Command Decode and Control Logic Write Protect Control Logic Device Select Logic Serial EEPROM Array 64K x 8 Data Register Y Decode Logic
Page Decode Logic
S1 S0
WP
Write Voltage Control
REV 1.1 9/7/00
www.xicor.com
Characteristics subject to change without notice.
1 of 16
X24512 Preliminary Information
PIN DESCRIPTIONS Serial Clock (SCL) The SCL input is used to clock all data into and out of the device. Serial Data (SDA) SDA is a bidirectional pin used to transfer data into and out of the device. It is an open drain output and may be wire-ORed with any number of open drain or open collector outputs. An open drain output requires the use of a pull-up resistor. For selecting typical values, refer to the Pullup resistor selection graph at the end of this data sheet. Device Select (S0, S1) The device select inputs (S0, S1) are used to set bits in the slave address. This allows up to four devices to share a common bus. These inputs can be static or actively driven. If used statically they must be tied to VSS or VCC as appropriate. If actively driven, they must be driven with CMOS levels (driven to VCC or VSS) and they must be constant between each start and stop issued on the SDA bus. These pins have an active pull down internally and will be sensed as low if the pin is left unconnected. Write Protect (WP) WP must be constant between each start and stop issued on the SDA bus and is always active (not gated). The WP pin has an active pull down to disable the write protection when the input is left floating. The Write Protect input controls the Hardware Write Protect feature. When held LOW, Protection is disabled and the device operates normally. When this input is held HIGH, the device is protected, preventing changes to any and all locations in the EEPROM array. PIN NAMES Symbol
S0, S1 SDA SCL WP VSS VCC NC
Description
Device Select Inputs Serial Data Serial Clock Write Protect Ground Supply Voltage No Connect
PIN CONFIGURATION
8-Lead XBGA: Top View VCC WP SCL SDA 1 2 3 4 8 7 6 5 S1 S0 NC VSS
20-Pin JEDEC SOIC/20-Pin TSSOP S0 S1 NC NC NC NC NC NC NC VSS 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC WP NC NC NC NC NC NC SCL SDA
REV 1.1 9/7/00
www.xicor.com
Characteristics subject to change without notice.
2 of 16
X24512 Preliminary Information
DEVICE OPERATION The device supports a bidirectional bus oriented protocol. The protocol defines any device that sends data onto the bus as a transmitter, and the receiving device as the receiver. The device controlling the transfer is a master and the device being controlled is the slave. The master will always initiate data transfers, and provide the clock for both transmit and receive operations. Therefore, the device will be considered a slave in all applications. Clock and Data Conventions Data states on the SDA line can change only during SCL LOW. SDA state changes during SCL HIGH are reserved for indicating start and stop conditions. Refer to Figures 1 and 2. Start Condition All commands are preceded by the start condition, which is a HIGH to LOW transition of SDA when SCL is HIGH. The device continuously monitors the SDA and SCL lines for the start condition and will not respond to any command until this condition has been met.
Figure 1. Data Validity
SCL
SDA Data Stable Data Change
Figure 2. Definition of Start and Stop
SCL
SDA Start Bit Stop Bit
Stop Condition All communications must be terminated by a stop condition, which is a LOW to HIGH transition of SDA when SCL is HIGH. The stop condition is also used to place the device into the standby power mode after a read sequence. A stop condition can only be issued after the transmitting device has released the bus. Acknowledge Acknowledge is a software convention used to indicate successful data transfer. The transmitting device, either master or slave, will release the bus after transmitting eight bits. During the ninth clock cycle the receiver will pull the SDA line LOW to acknowledge that it received the eight bits of data. Refer to Figure 3.
The device will respond with an acknowledge after recognition of a start condition and its slave address. If both the device and a write operation have been selected, the device will respond with an acknowledge after the receipt of each subsequent 8-bit word. In the read mode the device will transmit eight bits of data, release the SDA line and monitor the line for an acknowledge. If an acknowledge is detected and no stop condition is generated by the master, the device will continue to transmit data. If an acknowledge is not detected, the device will terminate further data transmissions. The master must then issue a stop condition to return the device to the standby power mode and place the device into a known state.
REV 1.1 9/7/00
www.xicor.com
Characteristics subject to change without notice.
3 of 16
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