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Details, datasheet, quote on part number:GS7025-CQM
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Datasheet text preview:
352/,1; TM GS7025
S er ial Digital Receiver
DATA SHEET FE ATURE S · SMPTE 259M-C compliant (270Mb/s) · automatic cable equalization (typically greater than 350m of high quality cable) · serial data outputs muted and serial clock remains active when input data is lost · operation independent of SAV/EAV sync signals · signal strength indicator output · carrier detect with programmable threshold level · power savings mode (output serial clock disable) · large IJT, typically 0.56UI beyond loop bandwidth · robust lock detect APP LI CATI O N S Cable equalization plus clock and data recovery for all high speed serial digital interface applications involving SMPTE 259M-C. D E S C R I P TI O N The GS7025 provides automatic cable equalization and high performance clock and data recovery for serial digital signals. The GS7025 receives either single-ended or differential serial digital data and outputs differential clock and retimed data signals at PECL levels (800mV). The on-board cable equalizer provides up to 35dB of gain at 135MHz which typically results in equalization of greater than 350m of high quality cable at 270Mb/s. The GS7025 requires only one external resistor to set the VCO centre frequency and provides adjustment free operation. The GS7025 has dedicated pins to indicate signal strength, carrier detect, and LOCK. Optional external resistors allow the carrier detect threshold level to be customized to the user's requirement. In addition, the GS7025 provides an 'Output Eye Monitor Test' (OEM_TEST) for diagnostic testing of signal integrity after equalization, prior to reslicing. The serial clock outputs can be disabled to reduce power. The GS7025 operates from a single +5 or -5 volt supply. ORDERING O RDE RI N G INFORMATION
PART NUMBER PACKAGE TEMPERATURE
GS7025
GS7025-CQM GS7025-CTM
44 pin MQFP Tray 44 pin MQFP Tape
0°C to 70°C 0°C to 70°C
A/D DDI DDI ANALOG DIGITAL MUX CARRIER DETECT PHASELOCK HARMONIC COSC LOCK LOGIC MUTE SDO SDI SDI +
-
VARIABLE GAIN EQ STAGE
FREQUENCY ACQUISITION PHASE DETECTOR
SDO CLK_EN SCO SCO
OEM_TEST
EYE MONITOR AUTO EQ CONTROL CHARGE PUMP LF+ LFS LF-
+ AGC CAP CD_ADJ SSI/CD
VCO
CBG RVCO
B LO C K BLOCK DIAGRAM
Revision Date: May 2003 GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3 Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: info@gennum.com www.gennum.com
Document No. 522 - 80 - 04
ABS O LUTE MAXIMUM RATINGS
PARAMETER VALUE
Supply Voltage (VS) Input Voltage Range (any input) Operating Temperature Range Storage Temperature Range Lead Temperature (soldering, 10 sec)
5.5V VCC + 0.5 to VEE - 0.5V 0°C TA 70°C
GS7025
-65°C TS 150°C 260°C
DC DC ELECTRICAL CHARACTERISTICS
VCC = 5.0V, TA = 0° 70°C unless otherwise stated, RLF = 1.8k, CLF1 = 15nF, CLF2 = 3.3pF
PARAMETER
CONDITION
MIN
TYPICAL
1
MAX
UNITS
NOTES
TEST LEVEL
Supply Voltage Supply Current CLK_EN = 0 CLK_EN = 1 SDI Common Mode Voltage DDI/DDI Common Mode Input Voltage Range DDI/DDI Differential Input Drive SSI/CD Output Current High, Om OH = -10µA High, 300m
OH = -10µA
4.75 VEE+(VDIFF/2) 200 -
5 115 125 2.4 0.4 to 4.6
5.25 VCC-(VDIFF/2) 2000 -
V mA mA V V 2
3 9 3 3 3
800 3
mV V
3 3
-
2.1
-
V
3
OEM_TEST Bias Potential A/D Input Voltage
50 High Low
2.0 2.0 2.5 -
4.75 -
0.8 0.8 0.8
V V
4
3 3
RSV1, IN _ENABLE Input Voltage CLK_EN Input Voltage
High Low High Low
V
3
V
3
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GENNUM CORPORATION 522 - 80 - 04
DC ELECTRICAL CHARACTERISTICS (continued)
VCC = 5.0V, TA = 0° 70°C unless otherwise stated, RLF = 1.8k, CLF1 = 15nF, CLF2 = 3.3pF
PARAMETER
CONDITION
MIN
TYPICAL1
MAX
UNITS
NOTES
TEST LEVEL
LOCK Output Low Voltage CLK_EN Source Current
IOL = 500µA Low, VIL =0V -
0.25 26
0.4 55
V µA
3
1 1
GS7025
NOTES 1. TYPICAL - measured on characterization board. 2. VDIFF is the differential input signal swing. 3. LOCK is an open collector output and requires an external pullup resistor. 4. If OEM_TEST is permanently enabled, operating temperature range is limited from 0°C to 60°C inclusive. TEST LEVELS 1. Production test at room temperature and nominal supply voltage with guardbands for supply and temperature ranges. 2. Production test at room temperature and nominal supply voltage with guardbands for supply and temperature ranges using correlated test. 3. Production test at room temperature and nominal supply voltage. 4. QA sample test. 5. Calculated result based on Level 1,2, or 3. 6. Not tested. Guaranteed by design simulations. 7. Not tested. Based on characterization of nominal parts. 8. Not tested. Based on existing design/characterization data of similar product. 9. Indirect test.
AC ELECTRICAL CHARACTERISTICS
VCC = 5.0V, VEE = 0V, TA = 0° 70°C unless otherwise stated, RLF = 1.8k, CLF1 = 15nF, CLF2 = 3.3pF
PARAMETER
CONDITIONS
MIN
TYPICAL
1
MA X
UNITS
NOTES
TEST LEVEL
Serial Data Rate Maximum Equalizer Gain (see Figure 3) Additive Jitter [Pseudorandom (2 Intrinsic Jitter [Pseudorandom (2
23 23
SDI @ 135MHz
-
270 (only) 35
-
Mb/s dB
3 6
-1)]
270Mb/s, 300m (Belden 8281) 270Mb/s
-
300
-
ps p-p
2, 7
9
-
185
-
ps p-p
2, 6
4
-1)] 270Mb/s 462 ps p-p 2, 6 3
Intrinsic Jitter [Pathological (SDI checkfield)] Input Jitter Tolerance Lock Time Synchronous Switch
270Mb/s tswitch 10 ms
0.40 0.5 -200
0.56 1 1 4 1 0 800 300 10 1.0
2 200 1000 400 -
UI p-p µs ms ms µs ps mV p-p ps k pF
3, 6 4
9 7
SDO Mute Time SDO to SCO Synchronization SDO, SCO Output Signal Swing SDO, SCO Rise & Fall times SDI/SDI Input Resistance SDI/SDI Input Capacitance 75 DC load 20%-80%
5
7 7 1 7
600 200 -
7 7
6 6
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GENNUM CORPORATION 522 - 80 - 04
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