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Details, datasheet, quote on part number:GS9025-CQM
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Datasheet text preview:
GENLINX TMII GS9025
Serial Digital Receiver
PRELIMINARY DATA SHEET FEATURES · SMPTE 259M compliant · operational to 540Mb/s · automatic cable equalization (typically greater than 350m of high quality cable at 270Mb/s) · adjustment-free operation · auto-rate selection (5 rates) with manual override · single external VCO resistor for operation with five input data rates · data rate indication output · system friendly: serial data outputs muted and serial clock remains active when input data is lost · operation independent of SAV/EAV sync signals · signal strength indicator output · output 'eye' monitor (OEM) with large signal amplitude and power down option · carrier detect with programmable threshold level · power savings mode (output serial clock disable) · 44 pin MQFP APPLICATIONS Cable equalization plus clock and data recovery for all high speed serial digital interface applications involving SMPTE 259M and other data standards. ORDERING INFORMATION
PART NUMBER G S 9025-CQ M GS9025-CTM
A/D DDI DDI ANALOG DIGITAL MUX CARRIER DETECT PHASELOCK HARMONIC LOGIC MUTE SDO SDI SDI +
-
DESCRIPTION The GS9025 provides automatic cable equalization and high performance clock and data recovery for serial digital signals. The GS9025 receives either single-ended or differential serial digital data and outputs differential clock and retimed data signals at PECL levels (800mV). The onboard cable equalizer provides up to 40dB of gain at 200MHz which typically results in equalization of greater than 350m of high quality cable at 270Mb/s. The GS9025 operates in either auto or manual data rate selection mode. In both modes, the GS9025 requires only one external resistor to set the VCO centre frequency and provides adjustment free operation. The GS9025 has dedicated pins to indicate signal strength/carrier detect, LOCK and data rate. Optional external resistors allow the carrier detect threshold level to be customized to the user's requirement. In addition, the GS9025 provides an 'Output Eye Monitor' (OEM) which allows the verification of signal integrity after equalization, prior to reslicing. The serial clock outputs can be disabled to reduce power consumption. The GS9025 operates from a single +5 or -5 volt supply.
GS9025
PACKAGE 44 pin MQFP Tray 44 pin MQFP Tape
COSC
TEMPERATURE 0°C to 70°C 0°C to 70°C
LOCK
VARIABLE GAIN EQ STAGE
FREQUENCY ACQUISITION PHASE DETECTOR
SDO CLK_EN SCO SCO
OEM
EYE MONITOR DIVISION AUTO EQ CONTROL CHARGE PUMP 3 BIT COUNTER SMPTE AUTO/MAN SS0 SS1 SS2
+ AGC CAP CD_ADJ SSI/CD
VCO
DECODER
LF+ LFS LF-
CBG RVCO
BLOCK DIAGRAM
Revision Date: November 2000 GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3 Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: info@gennum.com www.gennum.com Document No. 521 - 63 - 05
ABSOLUTE MAXIMUM RATINGS
PARAMETER Supply Voltage (VS) Input Voltage Range (any input) Operating Temperature Range Storage Temperature Range Lead Temperature (soldering, 10 sec) VALUE 5.5V VCC+0.5 to VEE-0.5V 0°C TA 70°C
GS9025
-65°C TS 150°C 260°C
DC ELECTRICAL CHARACTERISTICS
VCC = 5.0v, VEE = 0V, TA = 0°C to 70°C unless otherwise shown.
PARAMETER Supply Voltage Supply Current
SYMBOL VCC S
CONDITIONS
MI N 4. 75
TYP 5.0 115 125 135 145 2.5 0.4 to 4.6
MAX 5. 25 VCC-(VDIFF/2)
UNITS V mA mA mA mA V V
NOTES
TEST LEVEL 1 1 1 1 1 1
CLK_EN = 0 CLK_EN = 1 CLK_EN = 0, OEM active CLK_EN = 1, OEM active
VEE+(VDIFF/2)
SDI/SDI Common Mode Voltage DDI/DDI Common Mode Input Voltage Range DDI/DDI Differential Drive AGC+/AGC- Common Mode Voltage OEM Bias Potential SSI/CD Output Current VSSI/CD = 2.4V VSSI/CD = 0.4V (Muted) AUTO/MAN, SMPTE, SS[2:0] Input Voltage CLK_EN Input Voltage High Low
1
1
200 2.0 -
800 2.7 4.5 + 120 -1.0 -
2000 0.8
mV V V µA mA V V 3
1 1
3
1
High Low
2.5 500 4.4 Auto Mode 180
4.7 0.2 300
0.8 0.4 -
V V µA V V µA 3 4 3
1
LOCK Output Sink Current SS[2:0] Output Voltage High Low
1 1
SS[2:0] Source Current
1
2
GENNUM CORPORATION
521 - 63 - 05
DC ELECTRICAL CHARACTERISTICS (Continued)
VCC = 5.0v, VEE = 0V, TA = 0°C to 70°C unless otherwise shown.
PARAMETER SS[2:0] Sink Current SS[2:0] Source Current SS[2:0] Sink Current NOTES
SYMBOL
CONDITIONS Auto Mode Manual Mode Manual Mode
MI N 0.6 -
TYP 1 0.8 TEST LEVELS
MAX 0 5
UNITS mA µA µA
NOTES 3 3 3
TEST LEVEL 1 1 1
GS9025
1. VDIFF is the differential input signal swing. 2. See DESCRIPTION. 3. Pins SS[2:0] are outputs in AUTO mode and inputs in MANUAL mode. 4. LOCK is an open collector output and requires an external pullup resistor.
1. 100% tested at 25°C. 2. Guaranteed by design. 3. Inferred or correlated value.
AC ELECTRICAL CHARACTERISTICS
VCC = 5.0V, VEE = 0V, TA = 0°C to 70°C unless otherwise shown. RLF = 1k, CLF1 = 15nF, CLF2 = 5.6pF
PARAMETER Data Rate Maximum Equalizer Gain Additive Jitter
SYMBOL
CONDITIONS
MI N 143
TYP 40 300 275 -
MA X 540 0.1 ± 15 1000 200 400
UNITS Mb/s dB ps p-p ps p-p dB % µs ms ms ms mVp-p ps ps
NOTES
TEST LEVELS 1
at 200MHz tJ 270Mb/s, 300m 540Mb/s, 100m
-
see Figs 7-11
1
Jitter Transfer Function Peaking Frequency Drift when PLL loses lock Lock Time Synchronous Switch tSWITCH 10ms Lock Time Asynchronous Switch SDO/SDO, SCO/SCO Output Signal Swing SDO to SCO Synchronization SDO/SDO, SCO/SCO Rise & Fall Times NOTES 20 - 80%, TA =25°C 75 DC Load
2 2 1 2
600 -200 200
1 1 4 10 800 0 300
2 3
2 1 2 2
TEST LEVELS 1. 100% tested at 25°C. 2. Guaranteed by design. 3. Inferred or correlated value. 4. Evaluated using test setup Figure 1.
1. Synchronous switching refers to switching the input data from one source to another source which is at the same data rate (ie: line 10 switching for component NTSC). 2. Asynchronous switching refers to switching the input data from one source to another source which is at a different data rate. 3. Assuming 75 pullup resistors on SDO/SDO and SCO/SCO.
DATA TEKTRONIX GigaBERT 1400 TRANSMITTER DATA GS9028 CABLE DRIVER
BELDEN 8281 CABLE
EB9025 BOARD
TEKTRONIX GigaBERT 1400 ANALYZER TRIGGER
CLOCK
Fig. 1 Test Setup for Figures 6 - 11
3
GENNUM CORPORATION
521 - 63 - 05
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