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Part: GS9028-CTA
Category:
Multimedia
-> Video
-> Video Transport
Description: Genlinx ii Cable Driver With Two Adjustable Outputs
Company: Gennum Corporation
Datasheet: Download GS9028-CTA datasheet File size : 28 kB
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Datasheet text preview:
GENLINX TMII GS9028 Cable Driver
with Two Adjustable Outputs
DATA SHEET FEATURES · SMPTE 259M compliant · two complementary outputs, adjustable from 50 to 1000mVp-p into 75 loads · operational from DC to 622Mb/s · nominal 470ps rise and fall times · < ±7% output amplitude control · 45% system power reduction over the GS9008 · no external pulldown resistors required · input hysteresis · operational down to 80mV input amplitude · operates from a single +5 or -5 volt supply · 8 pin SOIC APPLICATIONS 4sc, 4:2:2, and 4:4:4:4 serial digital video interfaces from 143Mb/s to 540Mb/s; general purpose high speed cable driver applications. The GS9028 consumes 45% less system power than the GS9008 and does not require external pulldown resistors resulting in a smaller PCB footprint. Operational with input amplitudes as low as 80mV, the GS9028 is a robust serial interface device. The GS9028 is packaged in an 8 pin SOIC and operates from a single +5 or -5 volt supply. ORDERING INFORMATION
PART NUMBER G S 9028-CK A GS9028-CTA PACKAGE 8 pin SOIC 8 pin SOIC Tape TEMPERATURE 0°C to 70°C 0°C to 70°C
DESCRIPTION The GS9028 is a second generation bipolar integrated circuit designed to drive two 75 co-axial cables.
GS9028
The GS9028 features two complementary outputs whose amplitude is controlled within ± 7%. The output signal levels are also adjustable from as low as 50mV to as high as 1000mV with little change in other performance parameters. The output amplitude of the output stage is varied by adjusting the RSET resistor value.
BANDGAP REFERENCE AND BIASING CIRCUIT
RSET
SDI SDI
INPUT DIFFERENTIAL PAIR WITH HYSTERESIS
OUTPUT STAGE & RISE/FALL TIME CONTROL CIRCUIT
SDO SDO
BLOCK DIAGRAM
Revision Date: April 2000 GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3 Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: info@gennum.com www.gennum.com
Document No. 521 - 68 - 04
ABSOLUTE MAXIMUM RATINGS
TA = 25°C unless otherwise specified
PARAMETER Supply Voltage Input Voltage Range (any input)
VALUE 5.5V -0.3 to (VCC +0.3)V 0 to 70°C -65 to 150°C 2 6 0° C
GS9028
Operating Temperature Range Storage Temperature Lead Temperature (soldering, 10 sec)
DC ELECTRICAL CHARACTERISTICS
VCC = 5V, TA = 0°C to 70°C unless otherwise shown. Specifications assume 800mV output amplitude levels into end terminated 75 transmission lines.
PARAMETER Supply Voltage System Power Consumption Supply Current Common Mode Input Voltage Range Differential Input Common Mode Output Voltage Range Differential Output Input Hysteresis
SYMBOL VCC PD S VCM,IN VDIFF VCM,OUT VOUT
CONDITIONS
MI N 4. 75
TYP 5. 00 1 65
MA X 5. 25 195
UNITS V mW
NOTES
TEST LEVEL 1 3
Driving two 75 cables
-
2.4+(VDIFF/2) 80 -
33 -
39 VCC-(VDIFF/2) 1000 -
mA V
3 2
VCC-VOUT 8 00 -
mV V
2 2
RSET = 59
750 10
850 -
mV mV
1 2
AC ELECTRICAL CHARACTERISTICS
VCC = 5V, TA = 0°C to 70°C unless otherwise shown. Specifications assume 800mV output amplitude levels into end terminated 75 transmission lines.
PARAMETER Serial Data Rate Additive Jitter
SYMBOL
CONDITIONS
MI N 0
TYP 25 25 50 4 70 50
MA X 622 700 100
UNITS Mb/s ps p-p
NOTES
TEST LEVEL 1
270Mb / s 540Mb / s 622Mb / s
400 -
1
2
Output Rise/Fall Time Mismatch in Output Rise/Fall Times O ve r s h o o t Duty Cycle Distortion Output Return Loss TEST LEVELS 1. 100% tested at 25°C. 2. Guaranteed by design. 3. Correlated value.
tR, tF
20% - 80%
ps ps
3 1
540MHz NOTES -
5 50 17
8 100 -
% ps dB 2
1 2
1. RMS additive jitter measured using Pseudo Random bit sequence (223 - 1). 2. Measured with Gennum Evaluation Board (EB-RD35).
2
521 - 68 - 04
PIN CONNECTIONS
SDO SDO VEE RSET 8 VCC SDI SDI
1 2
7 GS9028 3 TOP VIEW 6 4 5
GS9028
VEE
PIN DESCRIPTIONS
NUMBER 1 2 4 6 7 SYMBOL S DO S DO RSET S DI S DI TYPE O O I I I Serial data output (inverse). Serial data output. Output amplitude control resistor. Serial data input (inverse). Serial data input. DESCRIPTION
INPUT/OUTPUT CIRCUITS
VCC
SDO
SDO
SDI
SDI
+ RSET
Fig. 1 Input Circuit (pins 6 and 7)
Fig. 2 Output Circuit (pins 1 and 2)
3
521 - 68 - 04
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