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Details, datasheet, quote on part number:74117A
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Datasheet text preview:
G S 7 4117A X FP-BGA Commercial Temp Industrial Temp Features
· Fast access time: 6, 7, 8, 10, 12 ns · CMOS low power operation: 170/150/130/105/95 mA at minimum cycle time · Single 3.3 V power supply · All inputs and outputs are TTL-compatible · Byte control · Fully static operation · Industrial Temperature Option: 40° to 85°C · Package: X: 6 mm x 10 mm Fine Pitch Ball Grid Array package
256K x 16 4Mb Asynchronous SRAM
1 2 3
6, 7, 8, 10, 12 ns 3.3 V VDD Center VDD and VSS
4 5 6
Fine Pitch BGA 256K x 16 Bump Configuration
A B C D E F G H
LB DQ1 DQ3 VSS VDD DQ6 DQ8 NC
OE UB DQ2 DQ4 DQ5 DQ7 NC A12
A0 A3 A5 A17 NC A8 A10 A13
A1 A4 A6 A7 A16 A9 A11 A14
A2 CE
NC DQ16
DQ15 DQ14 DQ13 DQ12 VDD VSS
Description
The GS74117A is a high speed CMOS Static RAM organized as 262,144 words by 16 bits. Static design eliminates the need for external clocks or timing strobes. The GS operates on a single 3.3 V power supply and all inputs and outputs are TTLcompatible. The GS74117A is available in a 6 x 10 mm Fine Pitch BGA package.
DQ10 DQ11 WE A15 DQ9 NC
Pin Descriptions Symbol
A0A17 DQ1DQ16 CE LB UB WE OE VDD VSS NC
Package X 6 x 10 mm Bump Pitch Top View
Description
Address input Data input/output Chip enable input Lower byte enable input (DQ1 to DQ8) Upper byte enable input (DQ9 to DQ16) Write enable input Output enable input +3.3 V power supply Ground No connect
Rev: 1.01 3/2002
1/12
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
G S 7 4117A X Block Diagram
A0 Address Input Buffer
Row Decoder
Memory Array
A 17 CE WE Control OE _____ UB LB _____
Column Decoder
I/O Buffer
DQ1
DQ16
Truth Table CE
H
OE
X
WE
X
LB
X L
UB
X L H L L H L X H
DQ1 to DQ8
Not Selected Read Read High Z Write Write Not Write, High Z High Z High Z
DQ9 to DQ16
Not Selected Read High Z Read Write Not Write, High Z Write High Z High Z
VDD Current
ISB1, ISB2
L
L
H
L H L
L
X
L
L H
ID D
L L
H X
H X
X H
Note: X: "H" or "L"
Rev: 1.01 3/2002
2/12
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
G S 7 4117A X Absolute Maximum Ratings
Parameter
Supply Voltage Input Voltage Output Voltage Allowable power dissipation Storage temperature
Symbol
VDD V IN VOUT PD T STG
Rating
0.5 to +4.6 0.5 to VDD +0.5 (£ 4.6 V max.) 0.5 to VDD +0.5 (£ 4.6 V max.) 0.7 55 to 150
Unit
V V V W
o
C
Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Recommended Operating Conditions
Parameter
Supply Voltage for -7/-8/-10/-12 Supply Voltage for -6 Input High Voltage Input Low Voltage Ambient Temperature, Commercial Range Ambient Temperature, Industrial Range
Symbol
V DD V DD VIH VIL TAc T AI
Min
3.0 3.135 2.0 0.3 0 40
Typ
3.3 3.3 -- -- -- --
Max
3.6 3.6 VDD +0.3 0.8 70 85
Unit
V V V V
o
C C
o
Notes: 1. Input overshoot voltage should be less than VDD +2 V and not exceed 20 ns. 2. Input undershoot voltage should be greater than 2 V and not exceed 20 ns.
Rev: 1.01 3/2002
3/12
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
G S 7 4117A X Capacitance
Parameter
Input Capacitance Output Capacitance
Symbol
C IN COUT
Test Condition
VIN = 0 V VOUT = 0 V
Max
5 7
Unit
pF pF
Notes: 1. Tested at TA = 25°C, f = 1 MHz 2. These parameters are sampled and are not 100% tested.
DC I/O Pin Characteristics
Parameter
Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage
Symbol
II L IL O VOH VOL
Test Conditions
VIN = 0 to VDD Output High Z VOUT = 0 to VDD IOH = 4 mA ILO = +4 mA
Min
1 uA 1 uA 2.4 --
Max
1 uA 1 uA -- 0.4 V
Power Supply Currents
Parameter Symbol Test Conditions CE £ VIL All other inputs S VIH or £ VIL Min. cycle time IOUT = 0 mA CE S VIH All other inputs S VIH or £VIL Min. cycle time CE S VDD - 0.2V All other inputs S VDD - 0.2V or £ 0.2V 0 to 70°C 6 ns 7 ns 8 ns 10 ns 12 ns 6 ns 7 ns 40 to 85°C 8 ns 10 ns 12 ns Unit
Operating Supply Current
ID D
170
150
130
105
90
180
160
140
115
100
mA
Standby Current
IS B 1
40
28
30
25
22
50
38
40
35
32
mA
Standby Current
IS B 2
10
20
mA
Rev: 1.01 3/2002
4/12
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
G S 7 4117A X AC Test Conditions
Parameter
Input high level Input low level Input rise time Input fall time Input reference level Output reference level Output load
Conditions
VIH = 2.4 V VIL = 0.4 V tr = 1 V/ns tf = 1 V/ns 1.4 V 1.4 V Fig. 1& 2
Output Load 1
DQ 50W VT = 1.4 V 30pF1
Output Load 2
3.3 V DQ 5pF1 589W 434W
Note: 1. Include scope and jig capacitance. 2. Test conditions as specified with output loading as shown in Fig. 1 unless otherwise noted. 3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ
Rev: 1.01 3/2002
5/12
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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