|
Details, datasheet, quote on part number:GS72108ATP-8
| |
Datasheet text preview:
GS72108ATP/J SOJ, TSOP Commercial Temp Industrial Temp Features
· Fast access time: 7, 8, 10, 12 ns · CMOS low power operation: 135/115/95/80 mA at minimum cycle time · Single 3.3 V power supply · All inputs and outputs are TTL-compatible · Fully static operation · Industrial Temperature Option: 40° to 85°C · Package line up J: 400 mil, 36-pin SOJ package TP: 400 mil, 44-pin TSOP Type II package
256K x 8 2Mb Asynchronous SRAM
A4 A3 A2 A1 A0 CE D Q1 D Q2 VDD V SS D Q3 D Q4 WE A 17 A 16 A 15 A 14 A 13 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
7, 8, 10, 12 ns 3.3 V VDD Center VDD and VSS
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 NC A5 A6 A7 A8 OE D Q8 D Q7 V SS VDD D Q6 D Q5 A9 A 10 A11 A 12 NC NC
SOJ 256K x 8-Pin Configuration
36-pin 400 mil SOJ
Description
The GS72108A is a high speed CMOS Static RAM organized as 262,144 words by 8 bits. Static design eliminates the need for external clocks or timing strobes. The GS operates on a single 3.3 V power supply and all inputs and outputs are TTLcompatible. The GS72108A is available in 400 mil SOJ and 400 mil TSOP Type-II packages.
Pin Descriptions Symbol
A0A17 DQ1DQ8 CE WE OE VD D VS S NC
Description
Address input Data input/output Chip enable input Write enable input Output enable input +3.3 V power supply Ground No connect
Package J
Rev: 1.04a 10/2002
1/12
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS72108ATP/J
TSOP-II 256K x 8-Pin Configuration
NC NC A4 A3 A2 A1 A0 CE D Q1 D Q2 VDD V SS D Q3 D Q4 WE A 17 A 16 A 15 A 14 A 13 NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 NC NC NC A5 A6 A7 A8 OE D Q8 D Q7 V SS VDD D Q6 D Q5 A9 A 10 A11 A 12 NC NC NC NC
44-pin 400 mil TSOP II
Package TP
Block Diagram
A0 Address Input Buffer
Row Decoder
Memory Array
A1 7 CE WE OE
Column Decoder
Control
I/O Buffer
D Q1
D Q8
Rev: 1.04a 10/2002
2/12
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS72108ATP/J Truth Table
CE
H L L L Note: X: "H" or "L"
OE
X L X H
WE
X H L H
DQ1 to DQ8
Not Selected R ead Write High Z
VDD Current
ISB1, ISB2
ID D
Absolute Maximum Ratings
Parameter
Supply Voltage Input Voltage Output Voltage Allowable power dissipation Storage temperature
Symbol
V DD VIN V OUT PD TSTG
Rating
0.5 to +4.6 0.5 to VDD +0.5 ( 4.6 V max.) 0.5 to VDD +0.5 ( 4.6 V max.) 0.7 55 to 150
Unit
V V V W
oC
Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Rev: 1.04a 10/2002
3/12
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
|
|