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Details, datasheet, quote on part number:GS74108TP-10
 
 
Part:GS74108TP-10
Description:10ns 512K X 8 4Mb Asynchronous SRAM
Company:GSI Technology
Datasheet:Download GS74108TP-10 datasheet   File size : 248 kB
Request For quote:  Find where to buy GS74108TP-10
 



Datasheet text preview:
G S 7 4 108T P / J SOJ, TSOP Commercial Temp Industrial Temp Features
· Fast access time: 8, 10, 12, 15ns · CMOS low power operation: 150/125/110/90 mA at min. cycle time. · Single 3.3V ± 0.3V power supply · All inputs and outputs are TTL compatible · Fully static operation · Industrial Temperature Option: -40° to 85°C · Package line up J: 400mil, 36 pin SOJ package TP: 400mil, 44 pin TSOP Type II package
512K x 8 4Mb Asynchronous SRAM
SOJ 512K x 8 Pin Configuration
A4 A3 A2 A1 A0 CE DQ1 DQ2 VDD VSS DQ3 DQ4 WE A17 A16 A15 A14 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
8, 10, 12, 15ns 3.3V VDD Center VDD & VSS
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
NC A5 A6 A7 A8 OE DQ8 DQ7 VSS VDD DQ6 DQ5 A9 A10 A11 A12 A 18 NC
36 pin 400mil SOJ
Description
The GS74108 is a high speed CMOS static RAM organized as 524,288-words by 8-bits. Static design eliminates the need for external clocks or timing strobes. Operating on a single 3.3V power supply and all inputs and outputs are TTL compatible. The GS74108 is available in 400 mil SOJ and 400 mil TSOP Type-II packages.
Pin Descriptions Symbol
A0 to A18 DQ1 to DQ8 CE WE OE V DD VSS NC
Description
Address input Data input/output Chip enable input Write enable input Output enable input +3.3V power supply Ground No connect
A13
Rev: 1.06 7/2000
1/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
G S 7 4 108T P / J
TSOP-II 512K x 8 Pin Configuration
NC NC A4 A3 A2 A1 A0 CE DQ1 DQ2 VDD VSS DQ3 DQ4 WE A17 A16 A15 A14 A13 NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 NC NC NC A5 A6 A7 A8 OE DQ8 DQ7 V SS V DD DQ6 DQ5 A9 A 10 A11 A 12 A 18 NC NC NC
44 pin 400mil TSOP II
Block Diagram
A0 Address Input Buffer
Row Decoder
Memory Array
A 18 CE WE OE
Column Decoder
Control
I/O Buffer
DQ1
DQ8
Rev: 1.06 7/2000
2/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
G S 7 4 108T P / J
Truth Table CE
H L L L Note: X: "H" or "L"
OE
X L X H
WE
X H L H
DQ1 to DQ8
Not Selected Read Write High Z
VDD Current
ISB1, ISB2
ID D
Absolute Maximum Ratings
Parameter
Supply Voltage Input Voltage Output Voltage Allowable power dissipation Storage temperature
Symbol
VDD V IN VOUT PD T STG
Rating
-0.5 to +4.6 -0.5 to VDD+0.5 ( 4.6V max.) -0.5 to VDD+0.5 ( 4.6V max.) 0.7 -55 to 150
Unit
V V V W
oC
Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Rev: 1.06 7/2000
3/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.