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Details, datasheet, quote on part number:4350
 
 
Part:4350
Category:Communication => Network => Encoder/Decoder/Encryption/Decryption
Description:Hifn Hipp Iii In-line Storage Security Processor 4 GBPS
Company:Hifn
Datasheet:Download 4350 datasheet   File size : 337 kB
Request For quote:  Find where to buy 4350
 



Datasheet text preview:
Hifn

HIPP III
4350
Protocols
· IPsec ESP · Tunnel or Transport Mode · Supports L2TP Security · ESP/UDP for NAT

Storage Security Processor

Preserve Data Security and Integrity for Both iSCSI and FCIP Hardware
The HIPP III 4350 Storage Security Processor efficiently addresses your needs for a standards compliant 2-port gigabit Ethernet solution
The HifnTM HIPP III 4350 Storage Security Processor is the first security processor designed for the specific requirements of IP Storage applications. The 4350 offers a complete IPSec data path solution optimized for IP Storage based systems, combining inbound and outbound policy processing, SA lookup, SA context handling, and packet formatting ­ all within a single chip. Hifn's 4350 delivers industryleading cryptographic functionality, supporting the DES/3DES-CBC, AES-CBC, AES-CTR, MD5, SHA-1 and AES-XCBC-MAC algorithms. Hifn also provides complete software support, including an on-board iSCSI-compliant IPSec software stack, offering an embedded HTML manager application. The HIPP III 4350 employs Hifn's FlowThroughTM Security Architecture to deliver two channels of fullduplex Gigabit Ethernet encrypted throughput in iSCSI (Internet Small Computer System Interface), FCIP (Fibre Channel over IP) and other IP-based storage networking systems. The high-speed HIPP III 4350 is optimized for use in server host bus adapters, FCIP bridges, storage routers, and storage arrays. Hifn's FlowThrough Security Architecture Hifn's FlowThrough Security Architecture is the cornerstone of a new family of solutions that vitally change the way security is built into the network. The new architecture enables security processors that sit directly in the data path, eliminating the inefficiencies of existing "look-aside" security designs. Fundamental to the new FlowThrough architecture is the acceleration of the entire data path of the IPSec protocol, which previously represented a heavy processing load on the Storage Processor or other processing elements in the system. The new architecture incorporates packet processing, link layer processing for Ethernet, security association hanProduct Brief Version 1.0

dling, and IPSec encryption/ authentication functions into silicon-based products. Hifn's FlowThrough Security Architecture enables high-performance, cost-effective security processors that provide wirespeed performance for encrypted traffic in IP Storage and high-performance network equipment. Easy Integration The HIPP III 4350 uses industry-standard GMII/TBI interfaces, supported by numerous GigE TOE (TCP Offload Engine) and Storage Processor vendors. It is typically interfaced between the GMII ports on a GigE TOE or Storage Processor and the Ethernet PHY. The 4350 supports two full-duplex Gigabit Ethernet ports. The control interface to the 4350 is achieved using in-band Ethernet frames. An additional 100Mbps Ethernet MII port allows an optional out-ofband control port, or it may be used to establish an inter-chip link for multi-chip designs. The chip includes two standard PC-133 SDRAM interfaces. One is used for program and data storage for the onboard embedded Session Control (eSC) processor. (In designs that don't require on-chip IKE, this RAM can be omitted.) The second SDRAM interface is used to store Security Associations (SAs) when many hundreds or thousands of secure tunnels are required. These standard interfaces allow integration into a variety of systems.
SA SDRAM
x32

Encryption
· AES (128 and 256-bit) · DES · 3DES

Authentication
· SHA-1 · MD5 · AES-XCBC-MAC

Interface Bus
· 4x GMII or TBI

On-Chip IKE
· Optional ICSAcompliant IKE running on-board · Supports Main Mode & Quick Mode · Pre-shared Key or RSA certificate authentication · Supports iSCSI initiation of IKE session setup and teardown

SDRAM
x16

Memory Bridge

Policy TCAM SA RAM
GMII/TBI

eSC Processor

RNG
MAC MII

GMAC

GMAC

HIPP III Core
DMA, I/O Buffer & Packet Queue Manager

HIPP III 4350 Block Diagram

GMAC

GMII/TBI

DPU II Packet Processor

Crypto Algorithm Processors

GMAC

GMII/TBI

GMII/TBI

Hifn

Features & Benefits
Single-chip, low-cost solution · 4Gbps IPSec processing (Full Duplex Dual GigEthernet) · 1M Packets Per Second, back-to-back SA variation · Minimal part count: Inexpensive PC-133 SDRAMs support on-chip IKE and/or optional local SA storage FlowThroughTM security processing Full IPSec Compliant Functionality · IPSec ESP in tunnel and transport modes · AES (CBC & CTR), DES/3DES, SHA-1, MD5, AES-XCBC-MAC Specifications · 13µ process, 324 LBGA (19mm square) · <1.75W Power consumption

HIPP III
4350
Supports Layer 3 and Layer 2 protocols.
Ethernet (Layer 2)
Ethernet DIX IEEE 802.3 10Base-T IEEE 802.3u 100Base-TX IEEE 802.3ab 1000Base-X IEEE 802.3x Flow Control IEEE 802.2 LLC IEEE 802.1q VLAN RFC1042 SNAP Jumbo 9K frame support

Storage Security Processor

· In-line IPSec protocol and algorithm processing · Streamlined & optimized for storage security · On-chip IKE processing (optional) · Complete IPSec/IKE processing enables easiest IPSec system implementation Optimized for site-to-site tunnels · 200 SAs supported on-chip · Up to 16,000 SAs with external PC-133 SDRAM · 256 on-chip policy entries

Applications
IP Storage
· Host Bus Adaptors (HBA's) · Target Bus Adaptors (TBA's) · SAN Switches · Storage Servers

SDRAM

HIPP III 4350
Dual GigE PHY
GMII/TBI GMII/TBI GMII/TBI GMII/TBI

IPSec (Layer 3)
RFC 2401 ­ IP Security Architecture RFC 2406 ­ IP Encryption RFC 2405 ­ DES-CBC Cipher Algorithm RFC 2403 ­ HMAC-MD5 RFC 2404 ­ HMAC-SHA-1 RFC 2409 - IKE

Dual 1 Gbps TCP Offload Engine (TOE)

3.3V & 1.2V Regulator

125 Mhz

PCI-X

Example Host Bus Adaptor with HIPP III 4350

Hifn Product Selection Guide
Hifn Products
HIPP I 7815 HIPP I 7855 HIPP II 8065 HIPP II 8165 HIPP II 8154 HIPP III 8300 HIPP III 8350 HIPP III 4300 HIPP III 4350
Streaming LZS 3-DES Bus MPPC AES PCI SHA MD5 1k-bit IKE RSA SSL signatures main-mode tunnels RSA set-ups DSA per second per second Hardware Hifn support Intelligent for public Packet keys up to Processing

Ordering Information
Package

120 241 2000 4500 906 250 400 10 300

85 150 1750 1750 1000 90 150 5 75

2K bits 2K bits 3K bits 3K bits 3K bits 4K bits 4K bits 4K bits 4K bits

480-pin BGA 480-pin BGA 576-pin TBGA 576-pin TBGA 576-pin TBGA 324-pin LBGA 324-pin LBGA 324-pin LBGA 324-pin LBGA

Part Number 4350

Speed 200 Mhz

Package 324 LBGA

Documentation: Datasheet User's Manual Programmers Reference Guide Performance Application Note Reference Hardware Document

750 University Avenue Los Gatos, CA 95032 408.399.3500 tel 408.399.3501 fax info@hifn.com

www.hifn.com

©2003 by Hi/fn, Inc. This product must be exported from the United States in accordance with the Export Administration Regulations. Diversion contrary to U.S. law prohibited. Hifn and FlowThrough are trademarks of Hi/fn, Inc. Hi/fn and LZS are registered trademarks of Hi/fn, Inc. All other trademarks are the property of their respective owners.