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Part: M34554M8
Category:
Microprocessors
-> 4 bit
-> 4500 series
Description:
Company: Renesas
Datasheet: Download M34554M8 datasheet File size : 1822 kB
Request For quote: Find where to buy M34554M8
Datasheet text preview:
4554 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
REJ03B0043-0200Z Rev.2.00 Jul 01, 2003
DESCRIPTION
The 4554 Group is a 4-bit single-chip microcomputer designed with C M O S technology. Its CPU is that of the 4500 series using a simple, high-speed instruction set. The computer is equipped with main clock selection function, four 8-bit timers (each timer has one or two reload register), interrupts, and LCD control circuit. The various microcomputers in the 4554 Group include variations of the built-in memory size as shown in the table below.
FEATURES
Minimum instruction execution time .......... 0.5 µs (at 6 MHz oscillation frequency, in high-speed through-mode) Supply voltage Mask ROM version ...... 2.0 to 5.5 V One Time PROM version ............ 2.5 to 5.5 V (It depends on oscillation frequency and operation mode) Timers Timer 1 ..... 8-bit timer with a reload register Timer 2 ..... 8-bit timer with a reload register Timer 3 ..... 8-bit timer with a reload register Timer 4 ......... 8-bit timer with two reload registers Timer 5 ...... 16-bit timer (fixed dividing frequency)
Interrupt ...... 7 sources Key-on wakeup function pins ......... 10 LCD control circuit Segment output ...... 32 Common output ........ 4 Voltage drop detection circuit (Reset) ....... Typ. 1.5 V Watchdog timer Clock generating circuit Main clock (ceramic resonator/RC oscillation/internal ring oscillator) Sub-clock (quartz-crystal oscillation) LED drive directly enabled (port D)
APPLICATION
Remot control transmitter
Part number M34554M8-XXXFP M34554MC-XXXFP M34554EDFP (Note)
Note: Shipped in blank.
ROM (PROM) size ( 10 bits) 8192 words 12288 words 16384 words
RAM size ( 4 bits) 512 words 512 words 512 words
Package 64P6N-A 64P6N-A 64P6N-A
ROM type Mask ROM Mask ROM One Time PROM
Rev.2.00
Jul 01, 2003
page 1 of 136
4554 Group
PIN CONFIGURATION
COM0
COM1
COM2
COM3
P00
P01
P02
P03
P10
P11
P12
P13
D0
D1
D2
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 SEG0/VLC3 SEG1/VLC2 SEG2/VLC1 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 D4 D5 D6 CNVSS VDCE XCIN XCOUT VDD VSS XOUT XIN RESET D7/CNTR0 C/CNTR1 D8/INT0 D9/INT1
M34554Mx-XXXFP M34554EDFP
D3
25 24 23 22 21 20 19 18 17
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24/P33
SEG25/P32
SEG26/P31
SEG27/P30
SEG28/P23
SEG29/P22
SEG30/P21
OUTLINE 64P6N-A
Pin configuration (top view) (4554 Group)
Rev.2.00
Jul 01, 2003
page 2 of 136
SEG31/P20
Block diagram (4554 Group)
Rev.2.00
4554 Group
4 4 4 4
Jul 01, 2003
I/O port
Port P0 Port P1 Port P3 Port P2
Internal peripheral functions
System clock generation circuit XIN -XOUT (Main clock) XCIN -XCOUT (Sub-clock) Power-on reset circuit Voltage drop detection circuit
page 3 of 136
Timer
Timer 1(8 bits) Timer 2(8 bits) Timer 3(8 bits) Timer 4(8 bits) Timer 5(16 bits)
Watchdog timer (16 bits)
Memory
ROM
8192, 12288, 16384 words 10 bits
4500 series CPU core
ALU(4 bits)
Register A (4 bits) Register B (4 bits) Register E (8 bits) Register D (3 bits) Stack register SK (8 levels) Interrupt stack register SDP (1 level)
LCD drive control circuit (Max.32 segments 4 common)
RAM
512 words 4 bits LCD display RAM including 32 words 4 bits
Segment output 4
Common output
Port C 1
Port D 2 8
32
Others parts begin by m3
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