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Details, datasheet, quote on part number:HT46C23
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Datasheet text preview:
HT46R23/HT46C23 8-Bit A/D Type MCU
Features
· Operating voltage: · Up to 0.5ms instruction cycle with 8MHz system clock
fSYS=4MHz: 2.2V~5.5V fSYS=8MHz: 3.3V~5.5V
· 23 bidirectional I/O lines (max.) · 1 interrupt input shared with an I/O line · 16-bit programmable timer/event counter with
at VDD=5V
· 8-level subroutine nesting · 8 channels 10-bit resolution (9-bit accuracy)
A/D converter
· 2-channel (6+2)/(7+1)-bit PWM output shared with
overflow interrupt and 7-stage prescaler
· On-chip crystal and RC oscillator · Watchdog Timer · 4096´15 program memory · 192´8 data memory RAM · Supports PFD for sound generation · HALT function and wake-up feature reduce power
two I/O lines
· Bit manipulation instruction · 15-bit table read instruction · 63 powerful instructions · All instructions in one or two machine cycles · Low voltage reset function · I2C Bus (slave mode) · 24/28-pin SKDIP/SOP packages
consumption
General Description
The HT46R23/HT46C23 are 8-bit, high performance, RISC architecture microcontroller devices specifically designed for A/D applications that interface directly to analog signals, such as those from sensors. The mask version HT46C23 is fully pin and functionally compatible with the OTP version HT46R23 device. The advantages of low power consumption, I/O flexibility, programmable frequency divider, timer functions, oscillator options, multi-channel A/D Converter, Pulse Width Modulation function, I2C interface, HALT and wake-up functions, enhance the versatility of these devices to suit a wide range of A/D application possibilities such as sensor signal processing, motor driving, industrial control, consumer products, subsystem controllers, etc.
I C is a trademark of Philips Semiconductors.
2
Rev. 1.30
1
March 26, 2003
HT46R23/HT46C23
Block Diagram
P A 5 /IN T
In te rru p t C ir c u it STACK P ro g ra m ROM P ro g ra m C o u n te r IN T C
TM R TM RC P A 3 /P . D
M U
P r e s c a le r X P A 4 /T M R
fS
YS
PA4 S Y S C L K /4
In s tr u c tio n R e g is te r
MP
M U
X
DATA M e m o ry PW
W DT P r e s c a le r M P o rt D
WDT
M U
X RC OSC M1
PDC PD In s tr u c tio n D ecoder ALU T im in g G e n e ra to r S h ifte r PA3,PA5 MUX
P D 0 /P W
M 0 ~ P D 1 /P W
8 -C h a n n e l A /D C o n v e rte r STATUS PBC PB P o rt B P B 0 /A N 0 ~ P B 7 /A N 7 PA PA PA PA PA PA 0~ 3/ 4/ 5/ 6/ 7/ P P. TM IN SD SC A2 D R T A L
PAC OSC2 OS RE VD VS S S D C1
P o rt A
ACC
LVR
PA I2 C B u s S la v e M o d e PC PCC P o rt C
PC 0~PC 4
Pin Assignment
P B 5 /A N 5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 P B 4 /A N 4 P B 5 /A N 5 1 2 3 4 5 6 7 8 9 10 11 12 P B 4 /A N 4 P A 3 /P . D PA2 PA1 PA0 P B 3 /A N 3 P B 2 /A N 2 P B 1 /A N 1 P B 0 /A N 0 VSS PC0 24 23 22 21 20 19 18 17 16 15 14 13 P B 6 /A N 6 P B 7 /A N 7 P A 4 /T M R P A 5 /IN T P A 6 /S D A P A 7 /S C L OSC2 OSC1 VDD RES P D 0 /P W M 0 PC1 P A 3 /P . D PA2 PA1 PA0 P B 3 /A N 3 P B 2 /A N 2 P B 1 /A N 1 P B 0 /A N 0 VSS PC0 PC1 PC2 28 27 26 25 24 23 22 21 20 19 18 17 16 15 P B 6 /A N 6 P B 7 /A N 7 P A 4 /T M R P A 5 /IN T P A 6 /S D A P A 7 /S C L OSC2 OSC1 VDD RES P D 1 /P W M 1 P D 0 /P W M 0 PC4 PC3
H T 4 6 R 2 3 /H T 4 6 C 2 3 2 4 S K D IP -A /S O P -A
H T 4 6 R 2 3 /H T 4 6 C 2 3 2 8 S K D IP -A /S O P -A
Rev. 1.30
2
March 26, 2003
HT46R23/HT46C23
Pad Assignment
HT46C23
P A 4 /T M R P A 6 /S D A P A 3 /P . D P B 4 /A N 4 P B 5 /A N 5 P B 6 /A N 5 P B 7 /A N 7 P A 5 /IN T
PA1 33
PA2 32
31
30
29
28
27
26
25
24
23 PA0 P B 3 /A N 3 P B 2 /A N 2 P B 1 /A N 1 4 5 21 19 VSS VSS 7 6 8 9 10 11 12 13 14 15 20 18 17 16 P B 0 /A N 0 3 1 2 22
P A 7 /S C L OSC2
(0 , 0 )
OSC1 VDD VDD TEST3 TEST2 TEST1
* The IC substrate should be connected to VSS in the PCB layout artwork.
PC0
PC1
PC2
PC3
PC4
P D 0 /P W M 0
RES
P D 1 /P W M 1
Pad Description
Pad Name PB0/AN0 PB1/AN1 PB2/AN2 PB3/AN3 PB4/AN4 PB5/AN5 PB6/AN6 PB7/AN7 PA0~PA2 PA3/PFD PA4/TMR PA5/INT PA6/SDA PA7/SCL VSS PC0~PC4 I/O Option Description
I/O
Pull-high
Bidirectional 8-bit input/output port. Software instructions determine the CMOS output, Schmitt trigger input with or without pull-high resistor (determined by pull-high: port option) or A/D input. Once a PB line is selected as an A/D input (by using software control), the I/O function and pull-high resistor are disabled automatically.
I/O
Pull-high Wake-up PA3 or PFD I/O or Serial Bus ¾ Pull-high
Bidirectional 8-bit input/output port. Each bit can be configured as wake-up input by options. Software instructions determine the CMOS output or Schmitt trigger input with or without pull-high resistor (determined by pull-high options: bit option). The PFD, TMR and INT are pin-shared with PA3, PA4 and PA5, respectively. Once the I2C Bus function is used, the internal registers related to PA6 and PA7 can not be used. Negative power supply, ground. Bidirectional 5-bit input/output port. Software instructions determine the CMOS output, Schmitt trigger input with or without pull-high resistor (determine by pull-high option: port option).
¾ I/O
Rev. 1.30
3
March 26, 2003
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