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Details, datasheet, quote on part number:HT46C47
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Datasheet text preview:
HT46R47/HT46C47 8-Bit A/D Type MCU
Features
· Operating voltage: · Up to 0.5ms instruction cycle with 8MHz system clock
fSYS=4MHz: 2.2V~5.5V fSYS=8MHz: 3.3V~5.5V
· 13 bidirectional I/O lines (max.) · 1 interrupt input shared with an I/O line · 8-bit programmable timer/event counter with overflow
at VDD=5V
· Six-level subroutine nesting · 4 channels 9-bit resolution (8-bit accuracy)
A/D converter
· 1 channel (6+2)-bit PWM output shared with an I/O
interrupt and 7-stage prescaler
· On-chip crystal and RC oscillator · Watchdog Timer · 2048“14 program memory · 64“8 data memory RAM · Supports PFD for sound generation · HALT function and wake-up feature reduce power
line
· Bit manipulation instruction · 14-bit table read instruction · 63 powerful instructions · All instructions in one or two machine cycles · Low voltage reset function · 18-pin DIP/SOP package
consumption
General Description
The HT46R47/HT46C47 are 8-bit, high performance, RISC architecture microcontroller devices specifically designed for A/D applications that interface directly to analog signals, such as those from sensors. The mask version HT46C47 is fully pin and functionally compatible with the OTP version HT46R47 device. The advantages of low power consumption, I/O flexibility, programmable frequency divider, timer functions, oscillator options, multi-channel A/D Converter, Pulse Width Modulation function, HALT and wake-up functions, enhance the versatility of these devices to suit a wide range of A/D application possibilities such as sensor signal processing, motor driving, industrial control, consumer products, subsystem controllers, etc.
Block Diagram
P A 5 /IN T
In te rru p t C ir c u it STACK P ro g ra m ROM P ro g ra m C o u n te r IN T C
TM R TM RC P A 3 /P . D
M U
P r e s c a le r X P A 4 /T M R
fS
YS
PA4 S Y S C L K /4
In s tr u c tio n R e g is te r
MP
M U
X
DATA M e m o ry PW
W DT P r e s c a le r M P o rt D
WDT
M U
X RC OSC
PDC PD In s tr u c tio n D ecoder ALU T im in g G e n e ra to r S h ifte r PA3,PA5 MUX
P D 0 /P W
M
4 -C h a n n e l A /D C o n v e rte r STATUS PBC PB P o rt B P B 0 /A N 0 ~ P B 3 /A N 3
PAC OSC2 OS RE VD VS S S D C1
P o rt A
ACC
LVR
PA
PA0 PA3 PA4 PA5 PA6
~P /P /T /IN ,P
A2 .D MR T A7
Rev. 1.00
1
January 2, 2003
HT46R47/HT46C47
Pin Assignment
P A 3 /P . D 1 2 3 4 5 6 7 8 9 PA2 PA1 PA0 P B 3 /A N 3 P B 2 /A N 2 P B 1 /A N 1 P B 0 /A N 0 VSS 18 17 16 15 14 13 12 11 10 P A 4 /T M R P A 5 /IN T PA6 PA7 OSC2 OSC1 VDD RES P D 0 /P W M
H T 4 6 R 4 7 /H T 4 6 C 4 7 1 8 D IP -A /S O P -A
Pad Assignment
HT46C47
P A 4 /T M R P A 3 /P . D P A 5 /IN T
PA6
PA1 23 1 2 3 4 5
PA2 22
TEST1 TEST2 TEST3 PA0 P B 3 /A N 3
21
20
19
18
17 16
PA7 OSC2
15 6 P B 2 /A N 2 7 P B 1 /A N 1 8 P B 0 /A N 0 9 VSS 10 VSS 11 P D 0 /P W M 12 RES 13 14 VDD VDD
OSC1
* The IC substrate should be connected to VSS in the PCB layout artwork.
Rev. 1.00
2
January 2, 2003
HT46R47/HT46C47
Pad Description
Pad Name PA0~PA2 PA3/PFD PA4/TMR PA5/INT PA6, PA7 PB0/AN0 PB1/AN1 PB2/AN2 PB3/AN3 VSS I/O Options Pull-high Wake-up PA3 or PFD Description Bidirectional 8-bit input/output port. Each bit can be configured as wake-up input by options. Software instructions determine the CMOS output or Schmitt trigger input with or without pull-high resistor (determined by pull-high options: bit option). The PFD, TMR and INT are pin-shared with PA3, PA4 and PA5, respectively. Bidirectional 4-bit input/output port. Software instructions determine the CMOS output, Schmitt trigger input with or without pull-high resistor (determined by pull-high options: bit option) or A/D input. Once a PB line is selected as an A/D input (by using software control), the I/O function and pull-high resistor are disabled automatically. Negative power supply, ground. Bidirectional I/O line. Software instructions determine the CMOS output, Schmitt trigger input with or without a pull-high resistor (determined by pull-high options: bit option). The PWM output function is pin-shared with PD0 (dependent on PWM options). Schmitt trigger reset input. Active low. Positive power supply OSC1, OSC2 are connected to an RC network or a Crystal (determined by options) for the internal system clock. In the case of RC operation, OSC2 is the output terminal for 1/4 system clock. TEST mode input pin It disconnects in normal operation.
I/O
I/O
Pull-high
¾
¾ Pull-high PD0 or PWM ¾ ¾ Crystal or RC
PD0/PWM
I/O
RES VDD OSC1 OSC2 TEST1 TEST2 TEST3
I ¾ I O
I
¾
Absolute Maximum Ratings
Supply Voltage ...VSS-0.3V to VSS+6.0V Input Voltage ......VSS-0.3V to VDD+0.3V Storage Temperature ....-50°C to 125°C Operating Temperature ...-40°C to 85°C
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
Rev. 1.00
3
January 2, 2003
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