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Details, datasheet, quote on part number:HT9302G
 
 
Part:HT9302G
Category:Communication => Modems
Description:1-memory/2-memory Tone/pulse Dialer
Company:Holtek Semiconductor Inc.
Datasheet:Download HT9302G datasheet   File size : 291 kB
Request For quote:  Find where to buy HT9302G
 



Datasheet text preview:
HT9302 Series
1-Memory/2-Memory Tone/Pulse Dialer
Features
· Universal specification · Operating voltage: 2.0V~5.5V · Low standby current · Low memory retention current: 0.1mA (typ.) · Tone/pulse switchable · Interface with LCD driver · 32 digits for redialing · 32 digits for SA memory dialing · One-key redialing · Pause and P®T key for PBX · 4´4 keyboard matrix · 3.58MHz crystal or ceramic resonator
Patent Number: 64097, 86474, 64529, 113235 (R.O.C.) 5424740 (U.S.A.)
· Hand-free control · Hold-line control · Pause, P®T can be saved for redialing · Lock function · Resistor options - M/B ratio - Flash function and flash time - Pause and P®T duration - Pulse number · HT9302A: 18-pin DIP package
HT9302B: 22-pin SKDIP package HT9302C: 20-pin DIP package HT9302D: 24-pin SKDIP package HT9302G: 16-pin DIP package
General Description
The HT9302 series tone/pulse dialers are CMOS LSIs for telecommunication systems. They are designed to meet various dialing specifications through resistor option matrix. The HT9302 series provide the pin-selected lock function, Hold-line, Hand-free and LCD dialing number display interface, all of which are suitable for feature phone applications. HT9302G is simpler than HT9302X version. It provides only a redialing memory for simple low-cost system applications.
Selection Table
Function Part No. HT9302x HT9302A HT9302B HT9302C HT9302D HT9302G HT9302G ¾ ¾ Ö Ö Ö Ö ¾ Ö ¾ Ö Lock Function (Pin Selection) Hold Line Hand Free (Normal version) ¾ Ö ¾ Ö (Simple version) ¾ ¾ 16 DIP ¾ ¾ Ö Ö 18 DIP 22 SKDIP 20 DIP 24 SKDIP LCD Interface Package
Rev. 1.20
1
September 30, 2002
HT9302 Series
Block Diagram
C1 Key C o lu m n C4
.SM
C o n tro l
C heck
DOUT CLO C K Tone O ut P u ls e O ut DTM . PO XM UTE
Key . u n c tio n E ncoder
W RM C o u n te r ADDRL
SRAM
Tone E ncoder C o n v e rte r
R1 Key Row R4
E ncoder . la s h D ebounce C lo c k C o n tro l M o d e In H D /H . HKS H.I HDI HDO H.O T im e r K e y to n e G e n e ra to r LO C K MODE
X1 X2
D iv id e r
C lo c k G e n e ra to r
M /B
Pin Assignment
HT9302x normal version
HDI HDI C1 C1 1 2 3 4 5 6 7 8 9 C2 C3 C4 LO CK X1 X2 XM UTE VSS 18 17 16 15 14 13 12 11 10 R4 R3 R2 R1 MODE DTM . PO HKS VDD C2 C3 C4 LO CK X1 X2 XM UTE VSS H.I 9 10 11 8 7 6 5 4 3 2 1 22 21 20 19 18 17 16 15 14 13 12 HDO R4 R3 R2 R1 MODE DTM . PO HKS VDD H.O C1 1 2 3 4 5 6 7 8 9 10 C2 C3 C4 LO CK X1 X2 XM UTE VSS DOUT 20 19 18 17 16 15 14 13 12 11 R4 R3 R2 R1 MODE DTM . PO HKS VDD CLO CK C1 C2 C3 C4 LO CK X1 X2 XM UTE VSS H.I DOUT 9 10 11 12 8 7 6 5 4 3 2 1 24 23 22 21 20 19 18 17 16 15 14 13 HDO R4 R3 R2 R1 MODE DTM . PO HKS VDD H.O CLO CK
H T9302A 1 8 D IP -A
H T9302B 2 2 S K D IP -A
H T9302C 2 0 D IP -A
H T9302D 2 4 S K D IP -A
HT9302G simple version
C1 1 2 3 4 5 6 7 8 C2 C3 X1 X2 XM UTE VSS VDD
16 15 14 13 12 11 10 9
R4 R3 R2 R1 MODE DTM . PO HKS
HT9302G 1 6 D IP -A
Rev. 1.20
2
September 30, 2002
HT9302 Series
Keyboard Information
H T 9 3 0 2 A /B /C /D
C1 R1 R2 R3 R4 7 * /T 0 4 8 # 1 5 9 R C2 2 6 P C3 3 C4 SA . R1 R2 R3 R4 7 * /T 0 4 8 # R
H T9302G
C1 1 5 9 P C2 2 6 . C3 3
HKS
Pin Description
Pin Name I/O Internal Connection Description
C1~C4 R1~R4
These pins form a 4´4 keyboard matrix which can perform keyboard input detection and dialing specification setting functions. When on-hook (HKS=high) all the pins are set high. While off-hook the column group (C1~C4) remains low and the row group (R1~R4) is set high for key input detection. An inexpensive single contact 4´4 keyboard can be used as an input device. I/O CMOS IN/OUT Pressing a key connects a single column to a single row, and actuates the system oscillator that results in a dialing signal output. If more than two keys are pressed at the same time, no response occurs. The key-in debounce time is 20ms. Refer to the keyboard information for keyboard arrangement and to the functional description for dialing specification selection. I The system oscillator consists of an inverter, a bias resistor and the necessary load capacitor on chip. Connecting a standard 3.579545MHz crystal or ceramic OSCILLATOR resonator to the X1 and X2 terminals can implement the oscillator function. The oscillator is turned off in the standby mode, and is actuated whenever a keyboard entry is detected. NMOS OUT XMUTE is an NMOS open drain structure pulled to VSS during dialing signal transmission. Otherwise, it is an open circuit. The XMUTE is used to mute the speech circuit when transmitting the dial signal. This pin is used to monitor the status of the hook-switch and its combination with HFI/HDI can control the PO pin output to make or break the line. HKS=VDD: On-hook state (PO=low). Except for HFI/HDI (hand-free/hold-line control input), other functions are all disabled. HKS=VSS: Off-hook state (PO=high). The chip is in the standby mode and ready to receive the key input. This pin is a CMOS output structure, which by receiving HKS and HFO/HDO signals, control the dialer to connect or disconnect the telephone line. PO outputs a low to break the line when HKS is high (on-hook) and HFO/HDO is low. PO outputs a high to make the line when HKS is low (off-hook) or HFO is high or HDO is high. During the off-hook state, the pin also outputs the dialing pulse train in pulse mode dialing. While in the tone mode, this pin is always high.
X1
X2
O
XMUTE
O
HKS
I
CMOS IN
PO
O
CMOS OUT
MODE
This is a three-state input/output pin, used for dialing mode selection whether Tone mode or Pulse mode; 10pps/20pps. MODE=VDD: Pulse mode, 10pps MODE=OPEN: Pulse mode, 20pps I/O CMOS IN/OUT MODE=VSS: Tone mode During pulse mode dialing, switching this pin to the tone mode changes the subsequent digit entry to tone mode. When the chips are in tone mode, switching to the pulse mode will also be recognized.
Rev. 1.20
3
September 30, 2002