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Details, datasheet, quote on part number:HT9315B
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Datasheet text preview:
HT9315 Series 15-Memory Tone/Pulse Dialer
Patent Number: 64097, 86474, 113235(R.O.C.), 5424740(U.S.A.)
Features
· Universal specification · Operating voltage: 2.0V~5.5V · Low standby current · Low memory retention current: 0.1mA (Typ.) · Tone/pulse switchable · Interface with LCD driver · 32 digits for redialing · 32 digits for the SA memory dialing · One-key redialing · Pause and P®T key for PBX · 4´5 keyboard matrix · 3.58MHz crystal or ceramic resonator · Hand-free control · Hold-line control · Pause, P®T can be saved for redialing · Lock function · Keytone function · Resistor options: - M/B ratio - Flash function and flash time (86ms~600ms) - Pause and P®T duration - Pulse number - Keyboard operated IDD lock function - Keyboard form · HT9315A/HT9315AL: 18-pin DIP package
HT9315B/HT9315BL: 22-pin SKDIP package HT9315C/HT9315CL: 20-pin DIP package HT9315D/HT9315DL: 24-pin SKDIP package
General Description
The HT9315 series tone/pulse dialers are CMOS LSIs for telecommunication systems. They are designed to meet various dialing specifications through resistor option matrix. T h e H T 9 3 1 5 s e r i e s a r e o ff e r e d i n t w o d i ff e r e n t v e r sions. They are HT9315x normal version and HT9315xL lock version, with keyboard-operated IDD lock function. The two versions also supply the following functions: Hold-line, Hand-free and LCD dialing number display interface, all of which are suitable for feature phone applications.
Selection Table
Function Item HT9315x HT9315A HT9315B HT9315C HT9315D HT9315xL HT9315AL HT9315BL HT9315CL HT9315DL Lock Function (Normal version) ¾ ¾ ¾ ¾ ¾ Ö ¾ Ö ¾ Ö ¾ Ö ¾ ¾ Ö Ö 98ms 20 DIP 24 SKDIP 18 DIP 22 SKDIP Hold-Line Hand-Free LCD Interface Min. Flash Time Package
(Mechanical and Keyboard Operated Lock Version) Lock 0 Lock 0, 9 Lock All Keyboard Operated Lock ¾ Ö ¾ Ö ¾ Ö ¾ Ö ¾ ¾ Ö Ö 98ms 20 DIP 24 SKDIP 18 DIP 22 SKDIP
Rev. 1.20
1
October 1, 2002
HT9315 Series
Block Diagram
C1 Key C o lu m n C5
.SM
C o n tro l
C heck
DOUT CLO CK Tone O ut P u ls e O ut DTM . PO XM UTE
Key . u n c tio n E ncoder
W RM C o u n te r
SRAM
Tone E ncoder C o n v e rte r
ADDRL R1 Key Row R4 E ncoder . la s h
D ebounce
M o d e In
H D /H .
HKS H.I HDI HDO H.O MODE
X1 X2
D iv id e r
C lo c k G e n e ra to r
M /B
T im e r K e y to n e G e n e ra to r
Pin Assignment
HT9315x/xL version
HDI HDI C1 C1 1 2 3 4 5 6 7 8 9 C2 C3 C4 C5 X1 X2 XM UTE VSS 18 17 16 15 14 13 12 11 10 R4 R3 R2 R1 MODE DTM . PO HKS VDD C2 C3 C4 C5 X1 X2 XM UTE VSS H.I 9 10 11 8 7 6 5 4 3 2 1 22 21 20 19 18 17 16 15 14 13 12 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13
HDO R4 R3 R2 R1 MODE DTM . PO HKS VDD H.O CLO CK
HDO R4 R3 R2 R1 MODE DTM . PO HKS VDD H.O
C1 1 2 3 4 5 6 7 8 9 10 C2 C3 C4 C5 X1 X2 XM UTE VSS DOUT 20 19 18 17 16 15 14 13 12 11
C1
R4 R3 R2 R1 MODE DTM . PO HKS VDD CLO CK
C2 C3 C4 C5 X1 X2 XM UTE VSS H.I DOUT
H T 9 3 1 5 A /A L 1 8 D IP -A
H T 9 3 1 5 B /B L 2 2 S K D IP -A
H T 9 3 1 5 C /C L 2 0 D IP -A
H T 9 3 1 5 D /D L 2 4 S K D IP -A
Keyboard Information
. o rm A
C1 R1 1 4 7 * /T 0 # 8 9 5 6 A R /P R2 R3 R4 C2 2 3 C3 C4 SA . C5 EM1 EM2 EM3 ST R1 R2 R3 R4 7 * /T 0 # R 4 8 9 A
. o rm
B
C1 1 5 6 . C2 2 3 P C3 C4 C5 EM1 EM2 EM3 ST
Rev. 1.20
2
October 1, 2002
HT9315 Series
Pin Description
Pin Name I/O Internal Connection Description These pins form a 4´5 keyboard matrix which can perform keyboard input detection and dialing specification setting functions. When on-hook (HKS=high) all the pins are set high. While off-hook the column group (C1~C5) remains low and the row group (R1~R4) is set high for key input detection. An inexpensive single contact 4´5 keyboard can be used as an input device. Pressing a key connects a single column to a single row, and actuates the system oscillator that results in a dialing signal output. If more than two keys are pressed at the same time, no response occurs. The key-in debounce time is 20ms. Refer to the keyboard information for keyboard arrangement and to the functional description for dialing specification selection.
C1~C5 R1~R4
I/O
CMOS IN/OUT
X1
I
X2
O
The system oscillator consists of an inverter, a bias resistor and the necessary load capacitor on chip. Connecting a standard 3.579545MHz crystal or ceramic OSCILLATOR resonator to the X1 and X2 terminals can implement the oscillator function. The oscillator is turned off in the standby mode, and is actuated whenever a keyboard entry is detected. NMOS OUT XMUTE is an NMOS open drain structure pulled to VSS during dialing signal transmission. Otherwise, it is an open circuit. XMUTE is used to mute the speech circuit when transmitting the dial signal. This pin is used to monitor the status of the hook-switch and its combination with HFI/HDI can control the PO pin output to make or break the line. HKS=VDD: On-hook state (PO=low). Except for HFI/HDI (hand-free/hold-line control input), other functions are all disabled. HKS=VSS: Off-hook state (PO=high). The chip is in the standby mode and ready to receive the key input. This pin is a CMOS output structure which by receiving the HKS and HFO/HDO signals, control the dialer to connect or disconnect the telephone line. PO outputs a low to break line when HKS is high (on-hook) and HFO/HDO is low. PO outputs a high to make line when HKS is low (off-hook) or HFO is high or HDO is high. During the off-hook state, this pin also outputs the dialing pulse train in pulse mode dialing. While in the tone mode, this pin is always high. This is a three-state input/output pin, use for dialing mode selection, either Tone mode or Pulse mode, 10pps/20pps MODE=VDD: Pulse mode, 10pps MODE=OPEN: Pulse mode, 20pps MODE=VSS: Tone mode During the pulse mode dialing, switching this pin to the tone mode changes the subsequent digit entry to tone mode. When the chips are in tone mode, switching to pulse mode will also be recognized. This pin is active only when the chip transmits tone dialing signals. Otherwise, it always outputs a low. The pin outputs tone signals to drive the external transmitter amplifier circuit. The load resistor should not be less than 5kW. This pin is a Schmitt trigger input structure. Active low. Applying a negative going pulse to this pin can toggle the HDO output once. An external RC network is recommended for input debouncing. The pull-high resistance is 200kW typ. The HDO is a CMOS output structure. Its output is toggle- controlled by a negative transition on HDI. When HDO is toggled high, PO keeps high to hold the line. The hold function can be released by setting HFO high or by an on/off hook operation or by another HDI input. Refer to the functional description for the hold-line function.
XMUTE
O
HKS
I
CMOS IN
PO
O
CMOS OUT
MODE
I/O
CMOS IN/OUT
DTMF
O
CMOS OUT
HDI
I
CMOS IN Pull-High
HDO
O
CMOS OUT
Rev. 1.20
3
October 1, 2002
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