|
Details, datasheet, quote on part number:HT93214A
| |
Datasheet text preview:
HT93214 Series 1-memory Tone/Pulse Dialer
Features
· Operating Voltage: 2.0V~5.5V · Low standby current · Low memory retention current: 0.1mA (Typ.) · Tone/Pulse switchable · 32 (pulse)/31 (tone) digits for redialing · Pause and P ® T key for PBX · 4´4 keyboard matrix · 3.58MHz crystal or ceramic resonator · Hand-free control
Patent Number: 86474, 84545(R.O.C)
· Pause, P ® T can be saved for redialing · One-key redialing · Keytone output · Pause time: 2.2s · Cascadable manual dialing after redialing · Calibrated DTMF timing for redialing · HT93214A: 16-pin DIP package
HT93214B/AT: 18-pin DIP package
General Description
The HT93214 are dialer series designed for low cost telephone set applications with expandable features such as Lock function, keytone and LCD display interface. With a 4´4 keyboard, it performs normal tone/pulse switchable dialing, and provides one-key redialing function with a 32-digit memory for speed dialing. An on-chip oscillator is built-in to work with an external 3.58Mhz crystal or ceramic resonator for accurate timing. The HT93214 provides 300ms (F1 key) and 600ms (F2 key) of flash time; Tone dialing and 10pps, 20pps selection with 1/2 M/B ratio for pulse dialing.
Selection Table
HT93214 series Function HandFree Part No. HT93214A HT93214B HT93214AT Ö Ö Key Tone Flash Control Control Control Flash Time (ms) 300/600 300/600 300/600 Inter Tone Pulse Tone Duration No. Pause (ms) (ms) N N N 94 94 94 96 96 96 PPS 10/20 10/20 10/20 M/B 1/2 1/2 1/2 PKG DIP 300mil 16 18 18
Rev. 1.10
1
October 2, 2002
HT93214 Series
Block Diagram
C1 Key C o lu m n C3
.SM
C o n tro l
C heck
Key . u n c tio n E ncoder
W RM C o u n te r ADDRL
SRAM
Tone E ncoder C o n v e rte r
Tone O ut P u ls e O ut
DTM .
PO XM UTE
R1 Key Row R4
E ncoder C lo c k C o n tro l . la s h /M o d e H. HKS H.I H.O MODEO MODE K e y to n e G e n e ra to r KT
D ebounce
X1 X2
D iv id e r
C lo c k G e n e ra to r
M /B
T im e r
Pin Assignment
H.O 1 2 3 4 5 6 7 8 9 HKS MODE X1 X2 VSS VDD DTM . XM UTE 8 7 6 5 4 3 2 1 16 15 14 13 12 11 10 9 R4 R3 R2 R1 C3 C2 C1 PO HKS MODE X1 X2 VSS VDD DTM . XM UTE 18 17 16 15 14 13 12 11 10 H.I R4 R3 R2 R1 C3 C2 C1 PO HKS 1 2 3 4 5 6 7 8 9 MODE X1 X2 VSS VDD DTM . XM UTE MODEO 18 17 16 15 14 13 12 11 10 R4 R3 R2 R1 C3 C2 C1 PO KT
H T93214A 1 6 D IP -A
H T93214B 1 8 D IP -A
H T93214A T 1 8 D IP -A
Keyboard Information
C1 R1 R2 R3 R4 7 8 0 # * /T 4 5 9 R 1 2 6 C2 C3 3 HKS .1 .2 P
Rev. 1.10
2
October 2, 2002
HT93214 Series
Pin Description
Pin Name I/O Internal Connection Description These pins along with the HKS form a 4´4 keyboard matrix which can perform keyboard input detection. When on-hook (HKS=high) all the pins are set high. While off-hook the column group (C1~C3) is set low and the row group (R1~R4) remains high for input detection. Pressing a key connects a single row to a single column HKS and actuates the system oscillator that results in a dialing signal output. If more than two keys are pressed at the same time, no response occurs. The key-in debounce time is 20ms. The system oscillator consists of an inverter, a bias resistor and the necessary load capacitor on chip. Connecting a standard 3.579545MHz crystal or ceramic resonator to the X1 and X2 terminals can implement the oscillator function. The oscillator is turned off in the standby mode, and is actuated whenever a keyboard entry is detected. NMOS open drain structure pulled to VSS during dialing signal transmission. Otherwise, it is an open circuit. This pin is used to mute the speech circuit when transmitting the dial signal. This pin is used to monitor the status of the hook-switch and its combination with HFI can control the PO pin output to make or break the line. HKS=VDD: On-hook state (PO=low). Except for HFI (hand-free control input), other functions are all disabled. HKS=VSS: Off-hook state (PO=high). The chip is in the stand-by mode and ready to receive the key input. NMOS open drain output structure, which by receiving the HKS and HFO signals, control the dialer so as to connect or disconnect the telephone line. PO is pulled to VSS when HKS is high (on-hook) and HFO is low. PO is an open circuit which make the line connection when HKS is low (off-hook) or HFO is high. During the off-hook state, this pin also outputs the dialing pulse train in pulse mode dialing. While in the tone mode, this pin is always an open circuit. This is a tri-state input/output pin, used for dialing mode selection, either Tone mode or Pulse mode, 10pps/20pps MODE=VDD: Pulse, 10pps, M/B=1/2 MODE=Floating: Pulse, 20pps, M/B=1/2 MODE=VSS: Tone. The MODE selection is checked each time a key input is received. This pin is active only when the chip transmits tone dialing signals. Otherwise, it always outputs a low. The pin outputs tone signals to drive the external transmitter amplifier circuit. The load resistor (to VSS) should not be less than 5kW and any DC load connected to VDD is not allowed. NMOS open drain structure for keytone output. It outputs 34ms of 600Hz tone burst when any key is pressed in the pulse mode or when a function key is pressed in the tone mode. Pulled-high, this pin is a Schmitt trigger input structure. Active low. Applying a negative going pulse to HFI can toggle the HFO once and hence control the hand-free function. The pull-high resistance of HFI is about 200kW typ. An external RC network is recommended for input debouncing. The HFO pin is a CMOS output structure. Its output is toggle- controlled by a negative transition on HFI pin. When HFO is high, the hand-free function is enabled and PO outputs a high to connect the line. The hand-free function can be released by an on-off-hook operation or by another HFI input. Refer to the functional description for the hand-free functional operation. Positive power supply, 2.0V~5.5V for normal operation Negative power supply, ground NMOS open drain output pin pulled to VSS during tone output and is an open circuit during pulse output.
C1~C3 R1~R4
I/O
CMOS I/O
X1 X2
I O OSC
XMUTE
O
NMOS Open Drain
HKS
I
CMOS
PO
O
NMOS
MODE
I/O
CMOS
DTMF
O
CMOS
KT
O
NMOS
HFI
I
CMOS
HFO
O
CMOS
VDD VSS MODEO
¾ ¾ O
¾ ¾ NMOS
Rev. 1.10
3
October 2, 2002
|
|
