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Details, datasheet, quote on part number:HT93LC56
 
 
Part:HT93LC56
Category:Memory => ROM => EEPROM
Description:2k 3-wire CMOS Serial EePROM
Company:Holtek Semiconductor Inc.
Datasheet:Download HT93LC56 datasheet   File size : 524 kB
Request For quote:  Find where to buy HT93LC56
 



Datasheet text preview:
HT93LC56
CMOS 2K 3-Wire Serial EEPROM
Features
· Operating voltage VCC - Read: 2.0V~5.5V - Write: 2.4V~5.5V · Low power consumption - Operating: 5mA max. - Standby: 10mA max. · User selectable internal organization - 2K(HT93LC56): 256“8 or 128“16 · 3-wire Serial Interface · Write cycle time: 5ms max. · Automatic erase-before-write operation · Word/chip erase and write operation · Write operation with built-in timer · Software controlled write protection · 10-year data retention after 100K rewrite cycles · 106 rewrite cycles per word · Commercial temperature range (0°C to +70°C) · 8-pin DIP/SOP package
General Description
The HT93LC56 is a 2K-bit low voltage nonvolatile, serial electrically erasable programmable read only memory device using the CMOS floating gate process. Its 2048 bits of memory are organized into 128 words of 16 bits each when the ORG pin is connected to VCC or organized into 256 words of 8 bits each when it is tied to VSS. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. By popular microcontroller, the versatile serial interface including chip select (CS), serial clock (SK), data input (DI) and data output (DO) can be easily controlled.
Block Diagram
CS SK ORG C o n tro l L o g ic and C lo c k G e n e ra to r A d d re s s R e g is te r VCC A d d re s s D ecoder VSS
DI
D a ta R e g is te r
M e m o r y C e ll A rra y 2 K : (2 5 6 “ 8 o r 1 2 8 “ 1 6 )
O u tp u t B u ffe r
DO
Pin Assignment
CS 1 8 2 7 3 6 4 5 SK DI DO VCC NC ORG VSS NC 1 8 2 7 3 6 4 5 VCC CS SK ORG VSS DO DI CS 1 8 2 7 3 6 4 5 SK DI DO VCC NC NC VSS
HT93LC56 8 D IP -A /S O P -A
HT93LC56 8 S O P -B
HT93LC56 8 S O P -C
Rev. 1.20
1
October 26, 2001
HT93LC56
Pin Description
Pin Name CS SK DI DO VSS I/O I I I O ¾ Chip select input Serial clock input Serial data input Serial data output Negative power supply, ground Internal Organization When ORG is connected to VDD or ORG is floated, the (“16) memory organization is selected. When ORG is tied to VSS, the (“8) memory organization is selected. There is an internal pull-up resistor on the ORG pin. (HT93LC56-A) No connection Positive power supply Description
ORG
I
NC VCC
¾ ¾
Absolute Maximum Ratings
Operation Temperature (Commercial)..........0°C to 70°C Applied VCC Voltage with Respect to VSS........-0.3V to 6.0V Applied Voltage on any Pin with Respect to VSS........VSS-0.3V to VCC+0.3V Supply READ Voltage ...2V to 5.5V Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
D.C. Characteristics
Symbol VCC Parameter Operating Voltage Test Conditions VCC ¾ 5V 5V 2~5.5V 5V 5V 5V 5V 2~5.5V 5V 2~5.5V 5V 2~5.5V 5V 2~5.5V ¾ ¾ IOL=2.1mA IOL=10mA IOH=-400mA IOH=-10mA VIN=0V, f=250kHz VOUT=0V, f=250kHz Read Write ICC1 ICC2 ISTB ILI ILO VIL Operating Current (TTL) Operating Current (CMOS) Standby Current (CMOS) Input Leakage Current Output Leakage Current Input Low Voltage DO unload, SK=1MHz DO unload, SK=1MHz DO unload, SK=250kHz CS=SK=DI=0V VIN=VSS~VCC VOUT=VSS~VCC, CS=0V ¾ ¾ ¾ ¾ Conditions Min. 2.0 2.4 ¾ ¾ ¾ ¾ 0 0 0 0 2 0.9VCC ¾ ¾ 2.4 VCC-0.2 ¾ ¾ Typ. ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ Max. 5.5 5.5 5 5 5 10 1 1 0.8 0.1VCC V CC VC C 0.4 0.2 ¾ ¾ 5 5 Unit V V mA mA mA mA mA mA V V V V V V V V pF pF
VIH
Input High Voltage
VOL
Output Low Voltage
VOH CIN COUT
Output High Voltage Input Capacitance Output Capacitance
Rev. 1.20
2
October 26, 2001
HT93LC56
A.C. Characteristics
Symbol fSK tSKH tSKL tCSS tCSH tCDS tDIS tDIH tPD1 tPD0 tSV tHV tPR Parameter Clock Frequency SK High Time SK Low Time CS Setup Time CS Hold Time CS Deselect Time DI Setup Time DI Hold Time DO Delay to ²1² DO Delay to ²0² Status Valid Time DO Disable Time Write Cycle Time VCC=5V±10% Min. 0 250 250 50 0 250 100 100 ¾ ¾ ¾ 100 ¾ Max. 2000 ¾ ¾ ¾ ¾ ¾ ¾ ¾ 250 250 250 ¾ 5 VCC=3V±10% Min. 0 1000 1000 200 0 250 200 200 ¾ ¾ ¾ 400 ¾ Max. 500 ¾ ¾ ¾ ¾ ¾ ¾ ¾ 1000 1000 250 ¾ 5 VCC=2V* Min. 0 2000 2000 200 0 1000 400 400 ¾ ¾ ¾ 400 ¾ Max. 250 ¾ ¾ ¾ ¾ ¾ ¾ ¾ 2000 2000 ¾ ¾ ¾ kHz ns ns ns ns ns ns ns ns ns ns ns ms Unit
* For Read Operating Only A.C. test conditions Input rise and fall time: 5ns (1V to 2V) Input and output timing reference levels: 1.5V Output load circuit: See Figure below.
V C C = 1 .9 5 2 V
800W DO 100pF*
* Including scope and jig
tC CS
SS
tC tS
KH
DS
tS
KL
SK
tC
SH
tD
IS
DI
t D IH V a lid D a ta tP
D0
V a lid D a ta tP
D1
DO
H i- Z
Rev. 1.20
3
October 26, 2001