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Details, datasheet, quote on part number:HX3000
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Datasheet text preview:
HIGH PERFORMANCE (SOI-V) ASICS
HX3000
FAMILY
FEATURES
· · · · · · · Fabricated on Honeywell's Radiation Hardened 0.30µm Leff RICMOSTM Silicon On Insulator (SOI-V) process ASICS to 2.0M Usable Gates 3.3V or 2.5V Core Operation Mixed Voltage I/O Power Supply (2.5V, 3.3V) CMOS, PCI, Schmitt Trigger, LVDS, 5V Tol I/O Single- or Multi-Port Custom SRAM Drop-In Capability Supports Chip Level Power Down for Cold Sparing · · · · · · On-Chip Analog Phase Locked Loop (PLL) Maximum Clock Rates >300 MHz Total Dose Hardness 3x105 rad(Si) 1x106 rad(Si) Option Available Soft Error Rate < 1x10-11 Errors/Bit-Day No Latchup Three library options Gate Array High Speed Standard Cell Low Power Standard Cell Ultra Low Power Typical Results 85-140 nW/Gate/MHz (3.3V) 50-80 nW/Gate/MHz (2.5V)
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GENERAL DESCRIPTION
The HX3000 ASIC family is fabricated on Honeywell's RICMOSTM Silicon on Insulator (SOI-V) process. Very high density is achieved using a fully planarized 4-layer metal process, providing up to 1.0 million usable gates. The high density and performance characteristics of the SOI-V process enable device operation beyond 250 MHz over the full military temperature range, even after exposure to ionizing radiation. Flip-flops are available with a Soft Error Rate (SER) of less than 1x10-11 Errors/Bit-Day in the Adams 90% worst case environment. Each HX3000 design is based on our proven Radiation Insensitive CMOS (RICMOS) ASIC Library of logic elements, configurable RAMs, and selectable I/O pads. Clock tree insertion is provided for low skew clock distribution. This family is available with Honeywell's high reliability screening procedures and consistent with S requirements. QML qualification is anticipated. Designers can choose from a wide variety of I/O types. Buffer options include multiple drive strengths, three-state capability, and pull-up/pulldown resistors. PCI and LVDS buffers are also supported. 5 volt tolerant I/O provides interface to legacy components.
The HX3000 product family supports dual voltage I/O. The designer has the flexibility to specify either voltage supply for each I/O site. Each HX3000 array features on-chip Phase Locked Loops (PLLs) for clock deskewing and frequency multiplication. The PLL requires no external components.
_________________________________________________________________________________________________________ Solid State Electronics Center · 12001 State Highway 55, Plymouth, MN 55441· (800) 323-8295 · http://www.ssec.honeywell.com
HX3000
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H X 3 0 0 0 C h a r a c te r is tic s U s a b l e G a t e C o u n t (G a t e A r r a y ) U s a b l e G a t e C o u n t (H i g h P e r f o r m a n c e S C ) U s a b l e G a t e C o u n t (L o w P o w e r S C ) M a x i m u m D i e I/O * T y p i c a l In t r i n s i c D e l a y - 2 In p u t N A N D S e l e c t a b l e I/O I/O In t e r f a c e L e v e l s T y p ic a l P o w e r D is c u s s io n , µ W / G a t e / M H z 2 0 % D a t a , 2 0 0 % C l o c k A c t iv it y R a t e O p e r a ti n g V o lt a g e O p e r a tin g T e m p e r a tu r e P r o c e s s T e c h n o lo g y M in im u m G e o m e t r y S o f t E r r o r R a t e (S E R ) T o ta l D o s e H a rd n e s s H X303G 240K 300K 340K 176 HX306G 440K 625K 715K 240 H X311G 770K 1 .0 M 1 .2 M 336 H X314G 1 .0 M 1 .4 M 1 .6 M 388
1 2 5 p s @ 3 .3 V ; 1 6 5 p s @ 2 .5 V D r iv e r , R e c e iv e r , B i- D ir e c t i o n a l, T h r e e - S t a t e C M O S , S c h m it t T r ig g e r , P C I , L V D S , 5 V T o l 0 .1 4 @ 3 .3 V ; 0 .0 8 @ 2 .5 V 3 .3 + 0 . 3 V , 2 .5 + 0 .2 V -5 5 ° C to 1 2 5 ° C R IC M O S
TM
V SOI
0 . 3 0 µ m L e f f /0 . 3 5 µ m D r a w n 3 0 0 K r a d (S i ) (1 M r a d O p t i o n A v a i l a b l e )
* Contact Honeywell for additional I/O options
The HX3000 family has a special feature to allow a chip level power down mode in which the associated buses connected to the chip can remain active. The high impedance off-state buffer feature allows users to power down portions of their system for high reliability cold sparing. The HX3000 family provides options configurable single or multi-port SRAMs. for customers to use familiar CAD tools and libraries to map existing designs to Honeywell library components. Timing-driven placement, clock-tree synthesis, and placement-based optimization are also supported for fast design cycles. A variety of packaging options including QFP, PGA, BGA and Known-GoodDie (KGD) are available. Honeywell has had a leading role in the development and application of space qualified multichip modules for the last two decades. The HX3000 family of ASICS are the right choice for your high reliability space applications demanding high density, high speed and low power. To learn more about Honeywell's variety of space components, call us at 1-800-323-8295.
ASIC designers need not have prior experience in radiation hardening. Honeywell's VDSTM Design Kit and HX3000 libraries provide the necessary guidance to achieve first pass design success. The VDS Design Kit supports industry standard platforms including those offered by Mentor Graphics, Synopsys and Cadence. Design Kit options includes VHDL and Verilog. Honeywell can perform design translations to HX3000 ASICS from other CAD platforms and ASIC vendors. Our synthesis capabilities allow
To learn more about Honeywell Solid State Electronics Center, visit our web site at http://www.ssec.honeywell.com
Honeywell reserves the right to make changes to any products or technology herein to improve reliability, function or design. Honeywell does not assume any liability arising out of the application or use of any product or circuit described herein: neither does it convey any license under its patent rights nor the rights of others. Rev. G 1/03
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