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Details, datasheet, quote on part number:HX6656
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Datasheet text preview:
Military & Space Products
32K x 8 ROM--SOI
FEATURES
RADIATION · Fabricated with RICMOSTM IV Silicon on Insulator (SOI) 0.75 µm Process (Leff = 0.6 µm) · Total Dose Hardness through 1x106 rad(SiO2) · Typical Operating Power <15 mW/MHz · Dynamic and Static Transient Upset Hardness through 1x109 rad(Si)/s · Dose Rate Survivability through 1x1011 rad(Si)/s · Neutron Hardness through 1x1014 cm-2 · SEU Immune · Latchup Free · Asynchronous Operation · CMOS or TTL Compatible I/O · Single 5 V ± 10% Power Supply OTHER · Read Cycle Times < 17 ns (Typical) 25 ns (-55 to 125°C)
HX6656
· Packaging Options - 28-Lead Flat Pack (0.500 in. x 0.720 in.) - 28-Lead DIP, MIL-STD-1835, CDIP2-T28 - 36-Lead Flat Pack (0.630 in. x 0.650 in.)
GENERAL DESCRIPTION
The 32K x 8 Radiation Hardened ROM is a high performance 32,768 word x 8-bit read only memory with industrystandard functionality. It is fabricated with Honeywell's radiation hardened technology, and is designed for use in systems operating in radiation environments. The ROM operates over the full military temperature range and requires only a single 5 V ± 10% power supply. The ROM is available with either TTL or CMOS compatible I/O. Power consumption is typically less than 15 mW/MHz in operation, and less than 5 mW when de-selected. The ROM operation is fully asynchronous, with an associated typical access time of 14 ns. Honeywell's enhanced SOI RICMOSTM IV (Radiation Insensitive CMOS) technology is radiation hardened through the use of advanced and proprietary design, layout, and process hardening techniques. The RICMOSTM IV process is a 5-volt, SIMOX CMOS technology with a 150 Å gate oxide and a minimum drawn feature size of 0.75 µm (0.6 µm effective gate length--Leff). Additional features include tungsten via plugs, Honeywell's proprietary SHARP planarization process, and a lightly doped drain (LDD) structure for improved short channel reliability.
HX6656
FUNCTIONAL DIAGRAM
A :0-8,12-13
11
Row De co d e r
· · ·
32,768 x 8 M e mo ry A rray
· · ·
CE NCS
C o lumn Decoder Data O utp ut
Q :0-7 8
NO E
C S · CE · OE (0 = high Z)
S ig nal
1 = enab le d # S ig nal
A :9-11,14
4
A ll controls must b e e nab le d for a signal to p ass. (#: numb e r of b uffe rs, default = 1)
SIGNAL DEFINITIONS
A: 0-14 Q: 0-7 NCS Address input pins which select a particular eight-bit word within the memory array. Data Output Pins. Negative chip select, when at a low level allows normal read operation. When at a high level NCS forces the ROM to a precharge condition, holds the data output drivers in a high impedance state and disables all input buffers except CE. If this signal is not used it must be connected to VSS. Negative output enable, when at a high level holds the data output drivers in a high impedance state. When at a low level, the data output driver state is defined by NCS and CE. If this signal is not used it must be connected to VSS. Chip enable, when at a high level allows normal operation. When at a low level CE forces the ROM to a precharge condition, holds the data output drivers in a high impedance state and disables all the input buffers except the NCS input buffer. If this signal is not used it must be connected to VDD.
NOE
CE*
TRUTH TABLE
NCS L H X CE* H X L NOE L XX XX MODE Read Deselected Disabled Q Data Out High Z High Z
Notes: X: VI=VIH or VIL XX: VSSVIVDD NOE=H: High Z output state maintained for NCS=X, CE=X
*Not Available in 28-lead DIP or 28-Lead Flat Pack
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HX6656
RADIATION CHARACTERISTICS
Total Ionizing Radiation Dose The ROM will meet all stated functional and electrical specifications over the entire operating temperature range after the specified total ionizing radiation dose. All electrical and timing performance parameters will remain within specifications after rebound at VDD = 5.5 V and T =125°C extrapolated to ten years of operation. Total dose hardness is assured by wafer level testing of process monitor transistors and ROM product using 10 keV X-ray and Co60 radiation sources. Transistor gate threshold shift correlations have been made between 10 keV X-rays applied at a dose rate of 1x105 rad(SiO2)/min at T = 25°C and gamma rays (Cobalt 60 source) to ensure that wafer level X-ray testing is consistent with standard military radiation test environments. The ROM will meet any functional or electrical specification after exposure to a radiation pulse of 50 ns duration up to 1x1011 rad(Si)/s, when applied under recommended operating conditions.
Neutron Radiation The ROM will meet any functional or timing specification after a total neutron fluence of up to 1x1014 cm-2 applied under recommended operating or storage conditions. This assumes an equivalent neutron energy of 1 MeV.
Single Event Phenomena Transient Pulse Ionizing Radiation The ROM is capable of reading and retaining stored data during and after exposure to a transient ionizing radiation pulse of 1 µs duration up to 1x109 rad(Si)/s, when applied under recommended operating conditions. To ensure validity of all specified performance parameters before, during, and after radiation (timing degradation during transient pulse radiation (timing degradation during transient pulse radiation is 10%), it is suggested that stiffening capacitance be placed on or near the package VDD and VSS, with a maximum inductance between the package (chip) and stiffening capacitance of 0.7 nH per part. If there are no operate-through requirements, typical circuit board mounted de-coupling capacitors are recommended. All storage elements within the ROM are immune to single event upsets. No access time or other performance degradation will occur for LET 190 MeV/cm/mg2.
Latchup The ROM will not latch up due to any of the above radiation exposure conditions when applied under recommended operating conditions. Fabrication with the SIMOX substrate material provides oxide isolation between adjacent PMOS and NMOS transistors and eliminates any potential SCR latchup structures. Sufficient transistor body tie connections to the p- and n-channel substrates are made to ensure no source/drain snapback occurs.
RADIATION HARDNESS RATINGS (1)
Parameter Total Dose Transient Dose Rate Upset (3) Transient Dose Rate Survivability (3) Neutron Fluence Limits (2) 1x106 1x109 1x1011 1x1014 Units rad(SiO2) rad(Si)/s rad(Si)/s N/cm 2 Test Conditions
TA=25°C Pulse width 1 µs Pulse width 50 ns, X-ray, VDD=6.0 V, TA=25°C 1 MeV equivalent energy, Unbiased, TA=25°C
(1) Device will not latch up due to any of the specified radiation exposure conditions. (2) Operating conditions (unless otherwise specified): VDD=4.5 V to 5.5 V, TA=-55°C to 125°C. (3) Not guaranteed with 28Lead DIP.
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