Details, datasheet, quote on part number: HYM72V16M656HLT6
PartHYM72V16M656HLT6
CategoryMemory => DRAM => SDR SDRAM => Modules => 256 MB
Description16Mx64 Bits PC100 Sdram so Dimm Based on 16Mx16 Sdram With Lvttl, 4 Banks & 8K Refresh
CompanyHynix Semiconductor
DatasheetDownload HYM72V16M656HLT6 datasheet
  

 

Features, Applications
based on 16Mx16 SDRAM with LVTTL, 4 banks & 8K Refresh
DESCRIPTION

The HYM72V16M656H(L)T6 -Series are high speed 3.3-Volt Synchronous DRAM Modules composed of four 16Mx16 bit Synchronous DRAMs in 54-pin TSOPII and 8-pin TSSOP 2K bit EEPROM a 144-pin Zig Zag Dual pin glass-epoxy printed circuit board. Three 0.1uF decoupling capacitors per each SDRAM are mounted on the module. The HYM72V16M656H(L)T6 -Series are gold plated socket type Dual In-line Memory Modules suitable for easy interchange and addition of 128M bytes memory. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.

FEATURES

PC100 support 144pin SDRAM SO DIMM Serial Presence Detect with EEPROM 1.0" (25.4mm) Height PCB with double sided components Single 3.30.3V power supply 8 or Full page for Sequential Burst All device pins are compatible with LVTTL interface or 8 for Interleave Burst Data mask function by DQM Programmable CAS Latency 2, 3 Clocks SDRAM internal banks : four banks Module bank : one physical bank Auto refresh and self refresh 8192 refresh cycles / 64ms Programmable Burst Length and Burst Type

This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 0.1/Nov. 01

PIN ~ A12 /RAS, /CAS, /WE ~ DQ63 VCC VSS SCL SDA WP NC PIN NAME Clock Inputs Clock Enable Chip Select SDRAM Bank Address Row Address Strobe, Column Address Strobe, Write Enable Data Input/Output Mask Data Input/Output Power Supply (3.3V) Ground SPD Clock Input SPD Data Input/Output SPD Address Input Write Protect for SPD No Connection DESCRIPTION The system clock input. All other inputs are registered to the SDRAM on the rising edge of CLK Controls internal clock signal and when deactivated, the SDRAM will be one of the states among power down, suspend or self refresh Enables or disables all inputs except CK, CKE and DQM Selects bank to be activated during /RAS activity Selects bank to be read/written during /CAS activity Row Address ~ RA12, Column Address ~ CA8 Auto-precharge flag : A10 /RAS, /CAS and /WE define the operation Refer function truth table for details Controls output buffers in read mode and masks input data in write mode Multiplexed data input / output pin Power supply for internal circuits and input buffers Ground Serial Presence Detect Clock input Serial Presence Detect Data input/output Serial Presence Detect Address Input Write Protect for Serial Presence Detect on DIMM No connection

Note * CK1 are connected with termination R/C (Refer to the Block Diagram)

 

Related products with the same datasheet
HYM72V16M656HLT6-P
HYM72V16M656HLT6-S
HYM72V16M656HT6-S
Some Part number from the same manufacture Hynix Semiconductor
HYM72V16M656HLT6-P 16Mx64 Bits PC100 Sdram so Dimm Based on 16Mx16 Sdram With Lvttl, 4 Banks & 8K Refresh
HYM72V16M656HT6
HYM72V16M656HT6-S
HYM72V16M656LT6
HYM72V16M656T6
HYM72V16M656T6-8
HYM72V16M656TU6-8
HYM72V16M656UT6
HYM72V16M736BFU6
HYM72V16M736BLFU6
HYM72V16M736BLT6
HYM72V16M736BT6
HYM72V32636BLT8 32Mx64bits PC133 Sdram Unbuffered Dimm Based on 32Mx8 Sdram With Lvttl, 4 Banks & 8K Refresh
HYM72V32636BLT8-H
HYM72V32636HLT8 32Mx64bits PC133 Sdram Unbuffered Dimm Based on 32Mx8 Sdram With Lvttl, 4 Banks & 8K Refresh
HYM72V32636HLT8-H
HYM72V32636T8 32Mx64bits PC133 Sdram Unbuffered Dimm Based on 32Mx8 Sdram With Lvttl, 4 Banks & 8K Refresh
HYM72V32656BLT8 32Mx64bits PC100 Sdram Unbuffered Dimm Based on 32Mx8 Sdram With Lvttl, 4 Banks & 8K Refresh
HYM72V32656BLT8-P
HYM72V32656HLT8 32Mx64bits PC100 Sdram Unbuffered Dimm Based on 32Mx8 Sdram With Lvttl, 4 Banks & 8K Refresh
HYM72V32656HLT8-P
Same catergory

AT24C16Automotive : 16K 2-Wire Bus Serial Automotive EePROM. 5.0 (VCC 2.7 (VCC to 5.5V) Internally Organized (16K) 2-wire Serial Interface Schmitt Trigger, Filtered Inputs for Noise Suppression Bi-directional Data Transfer Protocol 100 kHz (2.7V) and 400 kHz (5V) Compatibility Write Protect Pin for Hardware Data Protection 8-byte Page 2K), 16-byte Page 8K, 16K) Write Modes Partial Page Writes are Allowed.

BS616UV2019 : SRAM. Wide Vcc operation voltage : C-grade: 1.8V~3.6V I-grade: at 25oC) Ultra low power consumption : Vcc = 2.0V C-grade: 8mA (Max.) operating current I -grade: 10mA (Max.) operating current 0.20uA (Typ.) CMOS standby current Vcc = 3.0V C-grade: 11mA (Max.) operating current I -grade: 13mA (Max.) operating current 0.30uA (Typ.) CMOS standby current High speed.

CXK79M36C160GB : Memory-sigmaram 16meg 1x1 HSTL I/o (512k X 36). The CXK79M72C160GB (organized as 262,144 words by 72 bits) and the CXK79M36C160GB (organized as 524,288 words by 36 bits) are high speed CMOS synchronous static RAMs with common I/O pins. They are manufactured in compliance with the JEDEC-standard 209 pin BGA package pinouts defined for SigmaRAMTM devices. They integrate input registers, high speed.

GS882Z18B : No Bus Turnaround. NBT (No Bus Turn Around) functionality allows zero wait Read-Write-Read bus utilization; fully pin-compatible with both pipelined and flow through NtRAMTM, NoBLTM and ZBTTM SRAMs V +10%/10% core power supply 3.3 V I/O supply User-configurable Pipeline and Flow Through mode ZQ mode pin for user-selectable high/low output drive IEEE 1149.1 JTAG-compatible.

HYMD512646AL8 : 1 GB. Hynix HYMD512646A(L)8-M/K/H/L series is unbuffered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 128Mx64 high-speed memory arrays. Hynix HYMD512646A(L)8M/K/H/L series consists of sixteen 64Mx8 DDR SDRAM in 400mil TSOPII packages a 184pin glass-epoxy substrate. Hynix HYMD512646A(L)8-M/K/H/L series.

IBM0418A4ANLAB : . x 18 organizations x 18 organizations 0.25 CMOS technology Synchronous Register-Latch Mode of Operation with Self-Timed Late Write Single Differential PECL Clock +3.3V Power Supply, Ground, 2.5V VDDQ 2.5V LVTTL Input and Output levels Registered Addresses, Write Enables, Synchronous Select, and Data Ins Latched Outputs Common I/O 30 Drivers Asynchronous.

K4F641612B : = K4F641612B 4M X 16bit CMOS Dynamic RAM With Fast Page Mode ;; Organization = 4Mx16 ;; Mode = Fast Page ;; Voltage(V) = 3.3 ;; Refresh = 4K/64ms ;; Speed(ns) = 50,60 ;; Package = 50TSOP2 ;; Power = Normal,low ;; Production Status = Eol ;; Comments = -.

M53620405BT0 : SIMM. = M53620405BY0 4MB X 36 DRAM Simm Using 4MB X 16 & Quad Cas 4MBx4, 4KB Refresh, 5V ;; Density(MB) = 16 ;; Organization = 4Mx36 ;; Mode = Fast Page Q/c ;; Refresh = 4K/64ms ;; Speed(ns) = 50,60 ;; #of Pin = 72 ;; Component Composition = (4Mx16)x2+(4Mx4)x1 ;; Production Status = Eol ;; Comments = Solder,w,parity.

MH16S72AVJB-5 : . Some contents are subject to change without notice. The 16777216 - word 72-bit Sy nchronous DRAM module. This consist of nine industry standard 8 Sy nchronous DRAMs in TSOP. The TSOP on a card edge dual in-line package prov ides any application where high densities and large of quantities memory are required. This is a socket-ty pe memory m odule ,suitable.

MT48LC16M8A1TG : Synchronous DRAM.

N04M163WL1A : Medical SRAM. 4Mb, , 256K X 16, 2.3 - 3.6, 85, Medical Level 1 Processing, 48-BGA, 44-TSOP 2, Kgd,.

V62C1881024 : 1.8v 128k X 8 Static RAM. s High-speed: ns s Ultra low DC operating current 25 mA (max.) CMOS Standby: 5 A (Max.) s Fully static operation s All inputs and outputs directly compatible s Three state outputs s Ultra low data retention current (VCC 1V) s Single Power Supply voltage: 1.8V2.2V s Packages 32-pin TSOP (Standard) 32-pin STSOP The a 1,048,576-bit static randomaccess.

W29C020CTP : 2 Mb. 256kx8, 2m, 5v, 90, 128byte, Dip/ T:tsop/ P:plcc.

HYS72T32000HU-5-A : 240-Pin Unbuffered DDR2 SDRAM Modules The memory array is designed with 256-Mbit Double-Data-Rate-Two (DDR2) Synchronous DRAMs. Decoupling capacitors are mounted on the PCB board..

AS7C513C-12JIN : 32K X 16 STANDARD SRAM, 12 ns, PDSO44. s: Memory Category: SRAM Chip ; Density: 524 kbits ; Number of Words: 32 k ; Bits per Word: 16 bits ; Package Type: SOJ, 0.400 INCH, LEAD FREE, PLASTIC, SOJ-44 ; Pins: 44 ; Logic Family: CMOS ; Supply Voltage: 5V ; Access Time: 12 ns ; Operating Temperature: -40 to 85 C (-40 to 185 F).

DPE41257-250I : MEMORY MODULE,EEPROM,256KX8,CMOS,DIP,28PIN,CERAMIC. s: Memory Category: PROM.

EBE20AE4ACWA-8E-E : 256M X 72 DDR DRAM MODULE, 0.4 ns, DMA240. s: Memory Category: DRAM Chip ; Density: 19327353 kbits ; Number of Words: 256000 k ; Bits per Word: 72 bits ; Package Type: ROHS COMPLIANT, DIMM-240 ; Pins: 240 ; Supply Voltage: 1.8V ; Access Time: 0.4000 ns ; Operating Temperature: 0 to 85 C (32 to 185 F).

EDX5116ACSE-2A-E : 32M X 16 RAMBUS, PBGA104. s: Memory Category: DRAM Chip ; Density: 536871 kbits ; Number of Words: 32000 k ; Bits per Word: 16 bits ; Package Type: LEAD FREE, FBGA-104 ; Pins: 104 ; Supply Voltage: 1.8V.

NT5TB256M4DE-37B : 256M X 4 DDR DRAM, 0.5 ns, PBGA60. s: Memory Category: DRAM Chip ; Density: 1073742 kbits ; Number of Words: 256000 k ; Bits per Word: 4 bits ; Package Type: BGA, 0.80 MM PITCH, ROHS COMPLIANT, BGA-60 ; Pins: 60 ; Logic Family: CMOS ; Supply Voltage: 1.5V ; Access Time: 0.5000 ns ; Operating Temperature: 0 to 85 C (32 to 185 F).

PYA28C256-12CWM : EEPROM 5V. s: Memory Category: PROM, EEPROM.

 
0-C     D-L     M-R     S-Z