Details, datasheet, quote on part number: HYM72V16M656T6LT-8
PartHYM72V16M656T6LT-8
CategoryMemory => DRAM => SDR SDRAM => Modules => 128 MB => ->SO DIMM
Description16Mx64 Bits PC100 Sdram so Dimm Based on 16Mx16 Sdram With Lvttl, 4 Banks & 8K Refresh
CompanyHynix Semiconductor
DatasheetDownload HYM72V16M656T6LT-8 datasheet
  

 

Features, Applications
based on 16Mx16 SDRAM with LVTTL, 4 banks & 8K Refresh
DESCRIPTION

The HYM72V16M656T6 -Series are high speed 3.3-Volt Synchronous DRAM Modules composed of four 16Mx16 bit Synchronous DRAMs in 54-pin TSOPII and 8-pin TSSOP 2K bit EEPROM a 144-pin Zig Zag Dual pin glass-epoxy printed circuit board. Three 0.1uF decoupling capacitors per each SDRAM are mounted on the module. The HYM72V16M656T6 -Series are gold plated socket type Dual In-line Memory Modules suitable for easy interchange and addition of 128M bytes memory. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.

FEATURES

1.00(31.75mm) PCB Height One Row of SDRAMs on SO DIMM 144-Pin Unbuffered SO DIMM Serial Presence Detect with Serial E2PROM Meets all the other JEDEC specifications Single 3.3Vą0.3V power supply All device pins are LVTTL compatible 8192 refresh cycles every 64ms All inputs and outputs referenced to positive edge of system clock Internal four banks operation Programmable Burst Length and Burst Type - 1,2,4,8 and Full page for Sequential Burst - 1,2,4 and 8 for Interleave Burst Programmable /CAS latency ; 2,3 clocks Data mask function by DQM

This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 1.0/Dec.99

PIN ~ A12 /RAS, /CAS, /WE ~ DQ63 VCC VSS SCL SDA WP NC PIN NAME Clock Inputs Clock Enable Chip Select SDRAM Bank Address Row Address Strobe, Column Address Strobe, Write Enable Data Input/Output Mask Data Input/Output Power Supply (3.3V) Ground SPD Clock Input SPD Data Input/Output SPD Address Input Write Protect for SPD No Connection DESCRIPTION The system clock input. All other inputs are registered to the SDRAM on the rising edge of CLK Controls internal clock signal and when deactivated, the SDRAM will be one of the states among power down, suspend or self refresh Enables or disables all inputs except CK, CKE and DQM Selects bank to be activated during /RAS activity Selects bank to be read/written during /CAS activity Row Address ~ RA12, Column Address ~ CA8 Auto-precharge flag : A10 /RAS, /CAS and /WE define the operation Refer function truth table for details Controls output buffers in read mode and masks input data in write mode Multiplexed data input / output pin Power supply for internal circuits and input buffers Ground Serial Presence Detect Clock input Serial Presence Detect Data input/output Serial Presence Detect Address Input Write Protect for Serial Presence Detect on DIMM No connection

Note * CK1 are connected with termination R/C (Refer to the Block Diagram)

 

Related products with the same datasheet
HYM72V16M656LT6-8
HYM72V16M656LT6-P
HYM72V16M656LT6-S
HYM72V16M656T6-8
HYM72V16M656T6-P
HYM72V16M656T6-S
Some Part number from the same manufacture Hynix Semiconductor
HYM72V16M656TU6-8
HYM72V16M656UT6
HYM72V16M736BFU6
HYM72V16M736BLFU6
HYM72V16M736BLT6
HYM72V16M736BT6
HYM72V32636BLT8 32Mx64bits PC133 Sdram Unbuffered Dimm Based on 32Mx8 Sdram With Lvttl, 4 Banks & 8K Refresh
HYM72V32636BLT8-H
HYM72V32636HLT8 32Mx64bits PC133 Sdram Unbuffered Dimm Based on 32Mx8 Sdram With Lvttl, 4 Banks & 8K Refresh
HYM72V32636HLT8-H
HYM72V32636T8 32Mx64bits PC133 Sdram Unbuffered Dimm Based on 32Mx8 Sdram With Lvttl, 4 Banks & 8K Refresh
HYM72V32656BLT8 32Mx64bits PC100 Sdram Unbuffered Dimm Based on 32Mx8 Sdram With Lvttl, 4 Banks & 8K Refresh
HYM72V32656BLT8-P
HYM72V32656HLT8 32Mx64bits PC100 Sdram Unbuffered Dimm Based on 32Mx8 Sdram With Lvttl, 4 Banks & 8K Refresh
HYM72V32656HLT8-P
HYM72V32656T8 32Mx64bits PC100 Sdram Unbuffered Dimm Based on 32Mx8 Sdram With Lvttl, 4 Banks & 8K Refresh
HYM72V32736BLT8 32Mx72 Bits PC133 Sdram Unbuffered Dimm Based on 32Mx8 Sdram With Lvttl, 4 Banks & 8K Refresh
HYM72V32736BLT8-H
HYM72V32736T8 32Mx72 Bits PC133 Sdram Unbuffered Dimm Based on 32Mx8 Sdram With Lvttl, 4 Banks & 8K Refresh
HYM72V32756BLT8 32Mx72bits PC100 Sdram Unbuffered Dimm Based on 32Mx8 Sdram With Lvttl, 4 Banks & 8K Refresh
HYM72V32756BT8
 
0-C     D-L     M-R     S-Z