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Details, datasheet, quote on part number:IC61C1024-12T
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Datasheet text preview:
IC61C1024 IC61C1024L
Document Title
128K x 8 High-Speed SRAM
Revision History
Revision No
0A 0B
History
Initial Draft Revise typo on page 6 and page 8
Draft Date
March 13,2001 October 18,2001
Remark
The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
Integrated Circuit Solution Inc.
AHSR008-0B 10/18/2001
1
IC61C1024 IC61C1024L
128K x 8 HIGH-SPEED CMOS STATIC RAM
FEATURES
· High-speed access time: 12, 15, 20, 25 ns · Low active power: 600 mW (typical) · Low standby power: 500 µW (typical) CMOS standby · Output Enable (OE) and two Chip Enable (CE1 and CE2) inputs for ease in applications · Fully static operation: no clock or refresh required · TTL compatible inputs and outputs · Single 5V (±10%) power supply · Low power version available: IC61C1024L · Commercial and industrial temperature ranges available
DESCRIPTION
The ICSI IC61C1024 and IC61C1024L are very high-speed, low power, 131,072-word by 8-bit CMOS static RAMs. They a r e fabricated using ICSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices. When CE1 is HIGH or CE2 is LOW (deselected), the device assumes a standby mode at which the power dissipation can be reduced by using CMOS input levels. Easy memory expansion is provided by using two Chip Enable inputs, CE1 and CE2. The active LOW Write Enable (WE) controls both writing and reading of the memory. The IC61C1024 and IC61C1024L are available in 32-pin 300mil SOJ, and 8*20mm TSOP-1, and 8*13.4mm TSOP-1 packages.
FUNCTIONAL BLOCK DIAGRAM
A0-A16
DECODER
512 x 2048 MEMORY ARRAY
VCC GND I/O DATA CIRCUIT
I/O0-I/O7
COLUMN I/O
CE1 CE2 OE WE CONTROL CIRCUIT
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
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Integrated Circuit Solution Inc.
AHSR008-0B 10/18/2001
IC61C1024 IC61C1024L
PIN CONFIGURATION
32-Pin SOJ
NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A15 CE2 WE A13 A8 A9 A11 OE A10 CE1 I/O7 I/O6 I/O5 I/O4 I/O3
PIN CONFIGURATION
32-Pin 8x20mm TSOP-1 and 8x13.4mm TSOP-1
A11 A9 A8 A13 WE CE2 A15 VCC NC A16 A14 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE A10 CE1 I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A0 A1 A2 A3
PIN DESCRIPTIONS
A0-A16 CE1 CE2 OE WE I/O0-I/O7 Vcc GND Address Inputs Chip Enable 1 Input Chip Enable 2 Input Output Enable Input Write Enable Input Input/Output Power Ground
OPERATING RANGE
Range Commercial Industrial Ambient Temperature 0°C to +70°C 40°C to +85°C VCC 5V ± 10% 5V ± 10%
TRUTH TABLE
Mode Not Selected (Power-down) Output Disabled Read Write WE X X H H L CE1 H X L L L CE2 X L H H H OE X X H L X I/O Operation High-Z High-Z High-Z DOUT DIN Vcc Current ISB1, ISB2 ISB1, ISB2 ICC1, ICC2 ICC1, ICC2 ICC1, ICC2
Integrated Circuit Solution Inc.
AHSR008-0B 10/18/2001
3
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